Hello,
I have an problem with linux not being able to register a gpiochip on a custom FPGA board (Cyclone V).
I get the following error during kernel boot
_piochip_add: gpios -1…30 (/sopc@0/bridge@0xff200000/gpio@0x1000107a0) failed to register
/sopc@0/bridge@0xff200000/gpio@0x1000107a0: GPIO chip registration failed with status -28
altera_gpio ff2107a0.gpio: Failed adding memory mapped gpiochip
altera_gpio: probe of ff2107a0.gpio failed with error -28
After the kernel has complete the boot the folder ‘’/sys/class/fpga-bridge’’ is completely empty.
Does anyone know what error code -28 mean?
Hello,
I met the same problem. I could not tell You any explanation nor any whole fix, but I may help You partly.
The emptyness of folder “/sys/class/fpga-bridge” could be cause by wrong registration of all 3 bridges between FPGA nad HPS. Kernel reports it with messages on serial link during booting process. I my case they were:
[ 1.754974] altera_hps2fpga_bridge sopc@0:fpgabridge@0: Could not get hps2fpga reset control
[ 1.763448] altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@0 failed with error -22
[ 1.771415] altera_hps2fpga_bridge sopc@0:fpgabridge@1: Could not get lwhps2fpga reset control
[ 1.780042] altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@1 failed with error -22
[ 1.788001] altera_hps2fpga_bridge sopc@0:fpgabridge@2: Could not get fpga2hps reset control
[ 1.796453] altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@2 failed with error -22
I found the solution under this link: ‘https://forum.rocketboards.org/t/sys-class-fpga-bridge-empty/444/8’.
It seems me that somebody deleted some descriptions about reset signals by mistake from XML files in GSRD (16.0, the latest one) describing the board. Adding this to any of Yours XML files add proper reset description to Device Tree Blob (dtb file) and then Linux kernel will be able to register all bridges. At least this help me to do it, I am able to list all 3 directories of bridges in “/sys/class/fpga_bridges”.
By the way, the error with PIO komponents persist but reading and writing to their Avalon-Memory Map addresses function well.
I still wonder what error stauses like -28 or -22 means. I have been searching for very long time but I still do not know, what do they mean.
I hope this will help You a bit.
PS: I am working with Quartus Prime Standart edition and SoC EDS of version 17.0. The latest version at this time is 17.2, but there is no information at Release notes or Errata about this problem.
PPS: You can mention that one line of XML code about gmac1 in the link above is doubled by mistake. Of course, the second one is spare one and could (should) be deleted : ).
Hello,
I found out some more information about Yours error messages. I still do not know, how to repear it but know, that it is not a serious error.
If You look at the source code of the driver of the PIO component at Free-Electrons (http://elixir.free-electrons.com/linux/v4.1.22/source/drivers/gpio/gpio-altera.c), You can trace the error status to the header file http://elixir.free-electrons.com/linux/v4.1.22/source/include/uapi/asm-generic/errno-base.h#L15 where the error stauses are described. (Please, do not let You confuse that they are positive. The errors is used to always be negative and the sign is add at the driver C-file itself.) Error status -28 stands for “No space left on device”.
I am not sure, why there is no space but it could be caused by strange memory address written in Device Tree Blob. As You can see Linux thinks that Yours first PIO component is situated at address 0x1000107a0 (according to Your post). Its address associated in the Qsys in Yours project is 0x000107a0, isn’t it? There is still one extra ‘1’ at the begining. It is probably generated right, because all reference designs (as well as the mine) are of this form.
I am confused with the declaration of description for PIO components in Device Tree Blob file requeried by driver (according to http://elixir.free-electrons.com/linux/v4.1.22/source/Documentation/devicetree/bindings/gpio/gpio-altera.txt) and the real description generated in the Device Tree Blob file - they are quite different.
I would like to please anybody to inform me, if You found out any explanation. I am not going to investigate it anymore, because the only consequency is that the PIO components could not be found and used over /sys/class/gpio. PIO components could still (and have to) be reached via mmap function as any other Avalon-Memory Map component.
I hope this post help to somebody. Best regards.
Hello,
Thanks for the feedback.
I have added the following to my device tree:
hps_fpgabridge0: fpgabridge@0 {
compatible = “altr,socfpga-hps2fpga-bridge”;
label = “hps2fpga”;
clocks = <&l4_main_clk>;
};
hps_fpgabridge1: fpgabridge@1 {
compatible = "altr,socfpga-lwhps2fpga-bridge";
label = "lwhps2fpga";
clocks = <&l4_main_clk>;
};
hps_fpgabridge2: fpgabridge@2 {
compatible = "altr,socfpga-fpga2hps-bridge";
label = "fpga2hps";
clocks = <&l4_main_clk>;
};
After I have added the above , the “sys/class/fpga-bridge” directory contains the bridges. I can now use mmap to access the bridges and write to the FPGA components.