FPGA configuration without Quartus II Programmer


#1

Hello,

I am working on a project that will be deployed in the field with an FPGA that will not be able to be plugged into a typical desktop computer running Quartus. However, I may have to push software updates to the FPGA remotely. I am currently planning to use the Terasic DE0 Nano with the Cyclone IV, but may instead use the DE10 Nano SoC with the Cyclone V SoC depending on design requirements. The system will also have a Raspberry Pi 3 Model B v1.2 or greater. Is there a way for me to compile a .jic file on my master computer, sftp it to the Pi, and then install it on the FPGA?

Thanks in advance.


#2

Hello,
this question is probably out-of-date, so I hope that following response will help those looking for answear.
The right way to remote change of content of FPGA is use of DeviceTree overlay:

  1. compile new design with Quartus Prime to get SOF file,
  2. convert SOF file to RBF file,
  3. tranfer RBF file to SoC (e.g. via FTP protocol),
  4. use DeviceTree overaly for ‘fpga-region’ node.

Linux Driver of FPGA Manager applies the new design to the FPGA.
The only problem could be a form of DeviceTree blob, which would differ a bit design to design.
Many threads here, at forum.RocketBoards.org, discuss the solution, so it will be easy to find it. Moreover, the documentation of Linux kernel (see directory /Documentation of its source code) contains a description, how it all works.
Best wishes :slight_smile: