NIOS II and Ethernet

I have designed a custom system that reads from on-chip RAM, does some calculation and then send the result via UDP. This task is very time sensitive, so it is all implemented in VHDL. To prime the RAM with data, everytime I need to compile a new mif file and this is very cumbersome. Also, the RAM size is very limited.

As a solution, I built a NiosII softcore with ethernet and external DDR2 RAM, but I soon discovered that it wasn’t fast enough to do the custom stuff.

So I was thinking of NIOS II copying data to the RAM of the custom system, so that the speed target is reached.
I’m asking how to share a RAM between NiosII and the custom system. (DMA? Custom Instructions?)

Hello Albydnc,

I hope that your day is going well.

I am attempting to interface my FPGA with the ethernet. I am using a Cyclone V SOC on a DE0-nano SOC development board. I was wondering if you would be willing to share your fimrware and C code with me to assist me in my development efforts?