Hi guys I’m trying to load rbf to the FPGA on my Terasic DE10Nano with the fpga manager. I’ve read the great post: Load fpga rbf from device tree overlay example?
but still I get kernel panic and the FPGA Manager hangs in “write init” operation:
cat /sys/class/fpga_manager/fpga0/state
write init
My dts is:
/dts-v1/;
/plugin/;
/{
_ fragment@0 {_
_ target-path = “/soc/base-fpga-region”;_
_ #address-cells = <1>;_
_ #size-cells = <1>;_
_ overlay {_
_ #address-cells = <1>;_
_ #size-cells = <1>;_
_ firmware-name = “de10_daq.rbf”;_
_ };_
_ };_
};
compiled with:
./dtc -O dtb -o load_de10_daq.dtbo -b 0 -@ load_de10_daq.dts
and loaded with:
mkdir /config
mount -t configfs configfs /config
** rmdir /config/device-tree/overlays/test**
** mkdir /config/device-tree/overlays/test**
** ls -l /config/device-tree/overlays**
cd /lib/firmware
./devmem.exe 0xff800000 w 0x00000019 (activate bridge?)
echo load_de10_daq.dtbo > /config/device-tree/overlays/test/path
Eventually I get a Kernel Panic with a FPGA not programmed.
[ 1755.071868] fpga_manager fpga0: writing de10_daq.rbf to Altera SOCFPGA FPGA Manager
[ 1755.085879] Unhandled fault: imprecise external abort (0x406) at 0xf0600000
[ 1755.092822] pgd = eaf1c000
[ 1755.095519] [f0600000] *pgd=20cfb811, *pte=2aff165f, *ppte=2aff145f
[ 1755.101804] Internal error: : 406 [#1] SMP ARM………
Any Idea?
Thanks
G.
Hello, Gabriele,
I am used to use DeviceTree overlays very often. However, I use Linux kernel version 4.9.78 with my own configuration at my own distribution, so I it could differ from Your situation. By the way, these lines
write init
&
./devmem.exe 0xff800000 w 0x00000019
seems me strange and wrong. You should not activate or deativate any bridge between FPGA and HPS, driver of FPGA Manager does do it in consequence of writing DeviceTree Overlay file into the file at Config File System.
I could also advice to convert DTS into DTB file with:
dtc --in-format dts --out-format dtb load_de10_dag.dts > /config/device-tree/overlays/test/dtbo
I hope this help You a bit. Good luck.
Hello Jan.
Thanks for your reply.
Sorry for the bold character but the “write init” is only the state FPGA, read with a cat of the file /sys/class/fpga_manager/fpga0/state.
So it means that the loading of the fw was interrupted for some unexpected reason.
I think the problem is related to kernel version.
I noticed something else, too. During my tests on the sd card the ext3 filesystem was damaged. So the boot was incomplete but I gained a terminal. In these strange conditions the same files (dtbo, rbf) and the command:
echo load_de10_daq.dtbo > /config/device-tree/overlays/test/path
work correctly. The FPGA was programmed correctly with no warnings.
And fixing the start-up process the problem unfortunately returns.
So it seems related to some loaded modules during the boot. I’m going to try to disable the modules ko in the next days.
Thanks for you comments.
Gabriele
Hello, I’ve solved the problem.
During the boot process the Kernel loads a service “/lib/systemd/system/de10-nano-fpga-init.service”
[Unit]
Description=Start FPGA init
[Service]
Type=simple
ExecStart=/usr/bin/de10-nano-fpga-init.sh
[Install]
WantedBy=basic.target
And the script de10.nano-fpga-init.sh:
CONFIGFS_DIR=/sys/kernel/config/device-tree/overlays
BOARD_MODEL=$(cat /proc/device-tree/model)
# Checks to ensure that we have DT overlay support
if [ ! -e “$CONFIGFS_DIR” ]; then
_ echo “Error: Device Tree Overlay not supported”_
_ exit -1_
fi
DTBO_NAME=""
case “$BOARD_MODEL” in
_ “Terasic DE-0(Atlas)”)_
_ DTBO_NAME=“de0-nano.dtbo”_
_ ;;_
_ “Terasic DE10-Nano”)_
_ DTBO_NAME=“de10-nano.dtbo”_
_ ;;_
_ *)_
_ echo “NO BOARD MODEL MATCH”_
_ exit -1_
_ ;;_
esac
if [ ! -e /lib/firmware/$DTBO_NAME ]; then
_ echo “$DTBO_NAME file not found”_
_ exit -1_
fi
mkdir $CONFIGFS_DIR/$DTBO_NAME
echo $DTBO_NAME > $CONFIGFS_DIR/$DTBO_NAME/path
Eventually removing this script from the boot sequence, the FPGA Manager works correctly.
Thanks for the attention
Gabriele
