I got it working. The MSI RTL was not working for me at first, but I started the qsys project from scratch and it started working. I’m not sure what was wrong.
I stripped my code out of the qsys and did a save-as. Below is a lik to a working qsys for Cyclone V and an socfpga.dtsi with all the modules you need to get it working on Cyclone V. It’s not fast. It’s kinda clunky, but it works.
Please keep in mind that for the ARMv7 cores in the Cyclone V you must block the first 64KB of DRAM by adding this to your top level dts file, if you don’t you will get read errors:
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
pcidma1@0 {
reg = <0x00000000 0x00010000>;
no-map;
};
};
I have disabled the pcie, msi and fpga modules by default in the dtsi file attached. They need to be enabled in the top level dts file as well.
I can’t upload the zip file here. Here is a link to the intel forums where the file is stored:
I got it working on kernel 5.11, but it should work on 5.4 as well.
You probably need an account to download the file.