Welcome to the RocketBoards Forum [Uncategorized] (2)
Adding SPI support to DTS for DE1-SOC [Uncategorized] (2)
Problems instantiating DE10 Nano HDMI [Uncategorized] (1)
Linux initramfs with QSPI [Linux Kernel] (2)
Has anybody compiled an Cyclone V SOC HPS (DE10) *without* exporting HPS memory [Uncategorized] (1)
Dual EMAC with single MDIO [RocketBoards General] (1)
C Application and Qsys [Boot] (2)
HPS I/O loan / CAN transceiver access [Uncategorized] (4)
Looking for a mentor / teacher [RocketBoards General] (13)
Arria 10 SoC Development board Rev A [RocketBoards General] (1)
Arria 10 SoC Dev Kit, Usb Uart - FPGA [RocketBoards General] (5)
Couldn't compute FAST_CWD pointer [Uncategorized] (2)
Kernel crash when uploading HPS Bridge code [Uncategorized] (5)
Occurrence of DRAM ECC errors in arria10 SX660 - not consistent [Boot] (1)
DE1-SoC/Linux - Access to GPIO, I2C, ADC, etc [Linux Kernel] (1)
HPS memory instatiation in top level module [RocketBoards General] (1)
Linux rebuild - do_kernel_configme failure [Uncategorized] (2)
Sopc2dts, what means "Transparent bridge not yet supported"? [Uncategorized] (4)
Want local copy of "socfpga-4.1.33-ltsi" [Linux Kernel] (1)
Unable to access Angstrom Feeds [Linux Kernel] (1)
Undesirable triggering emif_reset [Boot] (1)
How to read and write an on-chip fifo from HPS / ARM? ( 2 ) [Uncategorized] (23)
No Network ip address display on board LCD [RocketBoards General] (1)
How to remove write protection? [Uncategorized] (5)
How to boot from debugging on Arria 10 board(Custom board) [Boot] (1)
Stale data read issue due to improper cache invalidation in Altera Cyclone V SOC running Linux [Linux Kernel] (4)
Platform Designer (Qsys) DMA Slave Address [RocketBoards General] (2)
FPGA for DSP on Adaptive Dynamic Vibration Absorber [RocketBoards General] (2)
ACP port setup, Linux, cache coherent from FPGA [Linux Kernel] (9)
Probem with uploading kernel into RAM [Linux Kernel] (1)