Welcome to the RocketBoards Forum
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Uncategorized
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(2)
Adding SPI support to DTS for DE1-SOC
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Uncategorized
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(2)
Problems instantiating DE10 Nano HDMI
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Uncategorized
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(1)
Linux initramfs with QSPI
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Linux Kernel
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(2)
Has anybody compiled an Cyclone V SOC HPS (DE10) *without* exporting HPS memory
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Uncategorized
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(1)
Dual EMAC with single MDIO
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RocketBoards General
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(1)
C Application and Qsys
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Boot
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(2)
HPS I/O loan / CAN transceiver access
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Uncategorized
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(4)
Looking for a mentor / teacher
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RocketBoards General
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(13)
Arria 10 SoC Development board Rev A
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RocketBoards General
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(1)
Arria 10 SoC Dev Kit, Usb Uart - FPGA
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RocketBoards General
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(5)
Couldn't compute FAST_CWD pointer
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Uncategorized
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(2)
Kernel crash when uploading HPS Bridge code
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Uncategorized
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(5)
Occurrence of DRAM ECC errors in arria10 SX660 - not consistent
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Boot
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(1)
DE1-SoC/Linux - Access to GPIO, I2C, ADC, etc
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Linux Kernel
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(1)
HPS memory instatiation in top level module
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RocketBoards General
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(1)
Linux rebuild - do_kernel_configme failure
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Uncategorized
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(2)
Sopc2dts, what means "Transparent bridge not yet supported"?
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Uncategorized
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(4)
Want local copy of "socfpga-4.1.33-ltsi"
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Linux Kernel
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(1)
Unable to access Angstrom Feeds
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Linux Kernel
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(1)
Undesirable triggering emif_reset
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Boot
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(1)
How to read and write an on-chip fifo from HPS / ARM?
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2
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Uncategorized
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(23)
No Network ip address display on board LCD
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RocketBoards General
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(1)
How to remove write protection?
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Uncategorized
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(5)
How to boot from debugging on Arria 10 board（Custom board）
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Boot
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(1)
Stale data read issue due to improper cache invalidation in Altera Cyclone V SOC running Linux
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Linux Kernel
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(4)
Platform Designer (Qsys) DMA Slave Address
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RocketBoards General
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(2)
FPGA for DSP on Adaptive Dynamic Vibration Absorber
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RocketBoards General
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(2)
ACP port setup, Linux, cache coherent from FPGA
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Linux Kernel
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(9)
Probem with uploading kernel into RAM
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Linux Kernel
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(1)
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