Accessing FPGA Peripherals from HPS (U-boot) Error

1

Hi everyone,
I am working with Intel Agilex F- Series Transceiver SOC Development Kit
I am trying to access sysid register from U-boot.
Observed board is getting reset.
Enabled all the bridges.

SOCFPGA_AGILEX # md 0x00000000 1
“Synchronous Abort” handler, esr 0x96000210
elr: 000000000029732c lr : 0000000000297278 (reloc)
elr: 000000007ff8f32c lr : 000000007ff8f278
x0 : 0000000000000009 x1 : 000000007faf0ee8
x2 : 00000000fffffffe x3 : 0000000000000020
x4 : 0000000000000030 x5 : 000000007faf0ee7
x6 : 0000000000000021 x7 : 000000007faf0e30
x8 : 00000000ffffffd8 x9 : 0000000000000008
x10: 0000000000000010 x11: 0000000000000006
x12: 000000000001869f x13: 000000007faf1158
x14: 000000007faf1260 x15: 0000000000000000
x16: 000000007ff1054c x17: 0000000000000000
x18: 000000007faf5da0 x19: 0000000000000004
x20: 0000000000000004 x21: 0000000000000001
x22: 0000000000000000 x23: 000000007ffa8417
x24: 000000007faf0ee9 x25: 0000000000000000
x26: 000000007faf0e98 x27: 0000000000000008
x28: 0000000000000004 x29: 000000007faf0e30

Code: 2a0403f3 17ffffca 7100129f 54000181 (b94002c3)
Resetting CPU …

Help me to solve above error

Thanks & Regards
Satrasala Raju

2

Hi Raju,
I was looking for the same error as I am also getting the error when I try to access the sysid from uboot command “md”.

Were you able to resolve the issue?
If yes, can you please tell me how did you resolve it.

Thanks in advance.

Best Regards,
spectral sensors

3

I’m also having the same problem.