Adding system-ram over PCIe with a FPGA but also without CXL

[ohault]

Linux Kernel has initial support for
Heterogeneous Memory Management and Memory tiering

What are the current projects to implement a solution to expose RAM on PCIe FPGA boards as host additional system-ram but using CXL and not using CXL?

[ohault]

Here is a first example:

• GitHub - takahiro-hirofuchi/meticulous-emulator: FPGA-based main memory emulator (https://arxiv.org/pdf/2309.06565.pdf)