Agilex boot source and fsbl

There’s so much information out there but none of it seems to match exactly our situation. We have a nand connected to the hps pins. The “Booting from Nand” page seems to still talk about creating a flash image, etc. So many questions.
Is the creation of a .jic file always required?
my fpga guy has built a sof, and has an hps_bootloader_handoff.bin file, but trying to load the sof results in “Error(19192): File hps_ghrd.sof is incomplete - HPS is present but bootloader information is missing”
I see that building arm-trusted-firmware creates bin files also. What is the next step? and can the FSBL “listen” over the uart to receive a boot binary (u-boot)? ie, send via xmodem or ymodem, etc.?


As per the rocket boards website, jic file creation is must for flashing.

FPGA-sof file
HPS FSBL-u-boot-spl-dtb.hex file
using quartus commands we can create the jic file.

The JIC file contains the configuration data required to program and configure the FPGA device.

Thanks & Regards
Raju S