I have adapted the example for the Arria 10 SOCDK (Arria 10 SoC - Boot from SD Card) to the HAN-Pilot-Platform evaluation board from Terasic. I used the make_sdimage_p3.py script to generate the SD-Card image without linux binaries:
Partition 3: (format raw, type 0xA2) - u-boot-splx4.sfp
Partition 1: (format fat) - sdfs folder with - fit_spl_fpga.itb and u-boot.img
Partition 2: (format ext3) - empty
The SOC start-up seems to be ok, but the FPGA does not get configured:
When i start the board without SDCARD, put it in, and then connect with the debugger and start the system with the Debugging U-Boot script. The system boots and the FPGA gets configured…
The start-up runs like from SD-Card, but the FPGA gets configured!
Does anyone have any idea what the problem could be?
Some more informations:
Quartus compilation with “Early Release of HPS IO”
1.1 Qsys EMIF with enabled “Early Release Mode”
Convert .sof to .rbf with: quartus_cpf.exe --convert --hps -o bitstream_compression=off golden_top.sof golden_top.rbf
Make fit_fpga_spl.itb with fit_fpga_spl.its in \u-boot-socfpga\board\altera\arria10-socdk
I recompiled U-Boot wit #define DEBUG in include\configs\socfpga_common.h and found these error:
No configuration specified, trying default…
Found default configuration: ‘config-1’
FPGA: FPGA node count: 2
FPGA: Start to program core bitstream …
FPGA: Data offset was found.
Can’t get ‘load’ property from FIT 0xffe24ec0, node: offset 248, name fpga-core-1 (FDT_ERR_NOTFOUND)
FPGA: No loadable was found.
FPGA: Using default DDR load address: 0x400 .
FPGA: External data: offset = 0x582d4, size = 0x1dcfb44.
blk_find_device: if_type=6, devnum=0: email@example.com, 6, 0