Arria 10 SoC hps2fpga and fpga2hps bridges missing from board info

Has anyone narrowed down the correct additions to the hps_a10_common_board_info.xml file to re-enable hps2fpga, fpga2hps, and lwhps2fpga in /sys/class/fpga-bridge for the a10soc? The closest I can find are the bridges that the bsp generator dumps out, but when I attempt to add those to my system dts, I get:
altera_hps2fpga_bridge fpgabridge.[1…3]: regmap for altr,l3regs lookup failed in dmesg, and still no bridges.

I’d really like to be able to load my IO ring in u-boot, then boot to linux & finish loading the core rbf into the fpgamanager from a network share. In the interim, I’m forced to build nfs support into u-boot and modify fpga load to just do it there, which is less than ideal.


Hello ,

I am having the same issue. I want to do communication between HPS and FPGA but on checking the /sys/class/fpga-bridge , there are no bridges present.
Have you found the solution to above problem ?
Do we need to modify the board xml files. If so could you help with the updates xml files.