For a custom board setup, I am attempting to write to the FPGA memory before initializing the DDR in the SPL, specifically within the spl_board_init function in spl_a10.c. This causes the CPU to enter Abort mode. It appears that accessing addresses through the lwhps2fpga bridge is not permitted at this stage of the process.
I checked the u-boot-spl device tree and I have there:
fpgabridge@1 {
compatible = "altr,socfpga-lwhps2fpga-bridge";
init-val = <0x01>;
};
What additional steps or configurations are necessary to enable access at this stage?