I’ve done a lot of desktop application development in C++ and OpenCL recently where I got quite used to using powerful modern C++ libraries and writing my own code in C++14.
Now I’m trying to create a cross-platform application that should run on desktop OS with CL capable GPUs as well as on Cyclone V FPGAs. This application will be built upon a huge in-house codebase implemented in modern C++, rewriting the codebase is absolutely no option.
I’ve got a Terasic DE10 Standard board here which runs the OpenCL capable Linux image available from the Terasic website. I successfully built some simple CL-accelerated test applications compiling the host code with the Cross Compiling toolchain from the EDS and the CL kernel with the Intel FPGA SDK for OpenCL. Works fine so far.
However when it came to set up something like a real-world application with dependencies to our codebase and other recent C++ libraries I had to realize that the toolchain coming with the EDS is massively outdated, some C++11 features are not supported, C++14 isn’t at all. So I tried to compile the whole thing with a more recent arm gcc obtained via the package manager, which worked in the first place but failed to execute on the board, as
libc present on the system don’t supply all needed symbols. Now I’m looking for the most efficient solution to work around this error. My ideas are:
- Manually updating the libs to a more recent version by simply replacing them. However I expect nasty side-effects due to some dependencies to further libs I might not be aware of. Please correct me if I’m wrong and this would be the easiest way to go
- Statically linking to those libraries at build time. However I read somewhere that this is also not supported and could lead to bugs using some system calls like
dlopen(which I plan to use in my application…)
- Re-building the whole Linux Image from scratch with the same compiler as used for application compilation. Would this lead to a Linux with compatible stdlibs? I’m a bit reluctant on this option as I have zero knowledge when it comes to yocto etc. and I suspect the configuration of all the components that make the FPGA, ARM, the shared memory, the OpenCL runtime etc work together to be a challenging task.
Any help would be greatly appreciated!