Boot from SD card hangs at "Waiting for device"

lars915 · August 23, 2016, 7:38pm

I am following the tutorial at rocketboards.org/foswiki/view/Documentation/EmbeddedLinuxBeginnerSGuide. Everything seems to work fine up to “Testing the system 2.” At that point the boot will hang before loading the root fs. The log is as follows:

Terminal ready

U-Boot SPL 2013.01.01 (Aug 17 2016 - 10:21:50)
BOARD : Altera SOCFPGA Cyclone V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 925 MHz
CLOCK: DDR clock 400 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 50000 KHz
CLOCK: QSPI clock 3613 KHz
RESET: COLD
INFO : Watchdog enabled
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 1024 MiB
ALTERA DWMMC: 0
reading u-boot.img
reading u-boot.img

U-Boot 2013.01.01-00126-g353283b (Aug 19 2016 - 13:09:56)

CPU : Altera SOCFPGA Platform
BOARD : Altera SOCFPGA Cyclone V Board
I2C: ready
DRAM: 1 GiB
MMC: ALTERA DWMMC: 0
*** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Skipped ethaddr assignment due to invalid EMAC address in EEPROM
Net: mii0
Warning: failed to set MAC address

Hit any key to stop autoboot: 5 4 3 2 1 0
reading u-boot.scr
589 bytes read in 4 ms (143.6 KiB/s)

Executing script at 02000000

– Programming FPGA –
reading soc_system.rbf
4244820 bytes read in 199 ms (20.3 MiB/s)

Starting application at 0x3FF79524 …

Application terminated, rc = 0x0

– Setting Env Variables –
reading zImage
3781960 bytes read in 177 ms (20.4 MiB/s)
reading soc_system.dtb
21849 bytes read in 7 ms (3 MiB/s)

Flattened Device Tree blob at 00000100

Booting using the fdt blob at 0x00000100
Loading Device Tree to 03ff7000, end 03fff558 … OK

Starting kernel …

[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Initializing cgroup subsys cpuset
[ 0.000000] Linux version 4.1.0zImage (larry@megadeth) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #1 SMP Wed Aug 17 14:22:29 MDT 2016
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine model: Altera SOCFPGA Cyclone V
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] PERCPU: Embedded 12 pages/cpu @bf7cb000 s19520 r8192 d21440 u49152
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096
[ 0.000000] Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait
[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Memory: 1031424K/1048576K available (5467K kernel code, 404K rwdata, 1476K rodata, 416K init, 151K bss, 17152K reserved, 0K cma-reserved, 0K highmem)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
[ 0.000000] vmalloc : 0xc0800000 - 0xff000000 (1000 MB)
[ 0.000000] lowmem : 0x80000000 - 0xc0000000 (1024 MB)
[ 0.000000] pkmap : 0x7fe00000 - 0x80000000 ( 2 MB)
[ 0.000000] modules : 0x7f000000 - 0x7fe00000 ( 14 MB)
[ 0.000000] .text : 0x80008000 - 0x806cffec (6944 kB)
[ 0.000000] .init : 0x806d0000 - 0x80738000 ( 416 kB)
[ 0.000000] .data : 0x80738000 - 0x8079d318 ( 405 kB)
[ 0.000000] .bss : 0x8079d318 - 0x807c3314 ( 152 kB)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] Additional per-CPU info printed with stalls.
[ 0.000000] NR_IRQS:16 nr_irqs:16 16
[ 0.000000] L2C: platform modifies aux control register: 0x02060000 -> 0x32460000
[ 0.000000] L2C: platform provided aux values permit register corruption.
[ 0.000000] L2C: DT/platform modifies aux control register: 0x02060000 -> 0x32460000
[ 0.000000] L2C-310 erratum 769419 enabled
[ 0.000000] L2C-310 enabling early BRESP for Cortex-A9
[ 0.000000] L2C-310 full line of zeros enabled for Cortex-A9
[ 0.000000] L2C-310 ID prefetch enabled, offset 1 lines
[ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled
[ 0.000000] L2C-310 cache controller enabled, 8 ways, 512 kB
[ 0.000000] L2C-310: CACHE_ID 0x410030c9, AUX_CTRL 0x76460001
[ 0.000000] clocksource timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604467 ns
[ 0.000005] sched_clock: 32 bits at 100MHz, resolution 10ns, wraps every 21474836475ns
[ 0.000342] Console: colour dummy device 80x30
[ 0.000361] Calibrating delay loop… 1836.64 BogoMIPS (lpj=9183232)
[ 0.060231] pid_max: default: 32768 minimum: 301
[ 0.060326] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.060337] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.060841] CPU: Testing write buffer coherency: ok
[ 0.060869] ftrace: allocating 19642 entries in 58 pages
[ 0.086993] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.087107] Setting up static identity map for 0x8280 - 0x82d8
[ 0.140255] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.140320] Brought up 2 CPUs
[ 0.140333] SMP: Total of 2 processors activated (3679.84 BogoMIPS).
[ 0.140339] CPU: All CPU(s) started in SVC mode.
[ 0.140742] devtmpfs: initialized
[ 0.145257] clocksource jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.146538] NET: Registered protocol family 16
[ 0.146587] fpga bridge driver
[ 0.147301] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.152925] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 0.152936] hw-breakpoint: maximum watchpoint size is 4 bytes.
[ 0.153025] socfpga-reset ffd05000.rstmgr: /sopc@0/rstmgr@0xffd05000 missing #reset-cells property
[ 0.153043] socfpga-reset: probe of ffd05000.rstmgr failed with error -22
[ 0.153337] altera_hps2fpga_bridge sopc@0:fpgabridge@0: Could not get hps2fpga reset control!
[ 0.153352] altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@0 failed with error -22
[ 0.153382] altera_hps2fpga_bridge sopc@0:fpgabridge@1: Could not get lwhps2fpga reset control!
[ 0.153395] altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@1 failed with error -22
[ 0.153422] altera_hps2fpga_bridge sopc@0:fpgabridge@2: Could not get fpga2hps reset control!
[ 0.153434] altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@2 failed with error -22
[ 0.181188] FPGA Mangager framework driver
[ 0.181454] SCSI subsystem initialized
[ 0.181731] usbcore: registered new interface driver usbfs
[ 0.181790] usbcore: registered new interface driver hub
[ 0.181846] usbcore: registered new device driver usb
[ 0.181969] sopc@0:usbphy@0 supply vcc not found, using dummy regulator
[ 0.182717] pps_core: LinuxPPS API ver. 1 registered
[ 0.182725] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti giometti@linux.it
[ 0.182754] PTP clock support registered
[ 0.183505] Switched to clocksource timer
[ 0.212521] NET: Registered protocol family 2
[ 0.213067] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.213136] TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
[ 0.213242] TCP: Hash tables configured (established 8192 bind 8192)
[ 0.213321] UDP hash table entries: 512 (order: 2, 16384 bytes)
[ 0.213364] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[ 0.213655] NET: Registered protocol family 1
[ 0.214105] RPC: Registered named UNIX socket transport module.
[ 0.214116] RPC: Registered udp transport module.
[ 0.214122] RPC: Registered tcp transport module.
[ 0.214127] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.214569] CPU PMU: Failed to parse /sopc@0/pmu0/interrupt-affinity[0]
[ 0.214604] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
[ 0.214673] arm-pmu arm-pmu: PMU:CTI successfully enabled for 2 cores
[ 0.215494] futex hash table entries: 512 (order: 3, 32768 bytes)
[ 0.225753] NFS: Registering the id_resolver key type
[ 0.225792] Key type id_resolver registered
[ 0.225799] Key type id_legacy registered
[ 0.225851] ntfs: driver 2.1.32 [Flags: R/W].
[ 0.226156] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[ 0.227031] io scheduler noop registered (default)
[ 0.231401] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
[ 0.232335] console [ttyS0] disabled
[ 0.232372] ffc02000.serial: ttyS0 at MMIO 0xffc02000 (irq = 24, base_baud = 6250000) is a 16550A
[ 0.862168] console [ttyS0] enabled
[ 0.866001] Serial: AMBA driver
[ 0.869611] altera_fpga_manager ff706000.fpgamgr: fpga manager [Altera FPGA Manager] registered as minor 0
[ 0.880816] brd: module loaded
[ 0.885186] CAN device driver interface
[ 0.889481] stmmaceth ff702000.ethernet: snps,phy-addr property is deprecated
[ 0.896667] stmmaceth ff702000.ethernet: Could not get reset control!
[ 0.903088] stmmaceth ff702000.ethernet: No sysmgr-syscon node found
[ 0.909443] stmmaceth ff702000.ethernet: Unable to parse OF data
[ 0.915812] ffb40000.usb supply vusb_d not found, using dummy regulator
[ 0.922447] ffb40000.usb supply vusb_a not found, using dummy regulator
[ 0.963561] dwc2 ffb40000.usb: EPs: 16, dedicated fifos, 8064 entries in SPRAM
[ 1.823614] dwc2 ffb40000.usb: DWC OTG Controller
[ 1.828326] dwc2 ffb40000.usb: new USB bus registered, assigned bus number 1
[ 1.835386] dwc2 ffb40000.usb: irq 36, io mem 0x00000000
[ 1.840834] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 1.847612] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.854813] usb usb1: Product: DWC OTG Controller
[ 1.859499] usb usb1: Manufacturer: Linux 4.1.0zImage dwc2_hsotg
[ 1.865490] usb usb1: SerialNumber: ffb40000.usb
[ 1.870618] hub 1-0:1.0: USB hub found
[ 1.874400] hub 1-0:1.0: 1 port detected
[ 1.878798] usbcore: registered new interface driver usb-storage
[ 1.885068] mousedev: PS/2 mouse device common for all mice
[ 1.890904] i2c /dev entries driver
[ 1.895690] ledtrig-cpu: registered to indicate activity on CPUs
[ 1.901853] usbcore: registered new interface driver usbhid
[ 1.907419] usbhid: USB HID core driver
[ 1.911429] oprofile: using arm/armv7-ca9
[ 1.916230] NET: Registered protocol family 10
[ 1.921209] sit: IPv6 over IPv4 tunneling driver
[ 1.926380] NET: Registered protocol family 17
[ 1.930831] NET: Registered protocol family 15
[ 1.935292] can: controller area network core (rev 20120528 abi 9)
[ 1.941648] NET: Registered protocol family 29
[ 1.946106] can: raw protocol (rev 20120528)
[ 1.950365] can: broadcast manager protocol (rev 20120528 t)
[ 1.956021] can: netlink gateway (rev 20130117) max_hops=1
[ 1.961669] 8021q: 802.1Q VLAN Support v1.8
[ 1.965902] Key type dns_resolver registered
[ 1.970228] Registering SWP/SWPB emulation handler
[ 1.977954] ttyS0 - failed to request DMA
[ 1.981999] Waiting for root device /dev/mmcblk0p2…
^[[15~

I don’t see any obvious problems. The kernel and U-boot seem to work fine. I am pretty new to Linux so I don’t even know what the loader is trying to do, and the Internet hasn’t been a lot of help. The SD card is a 16GB with only the 512Mb load described in the tutorial. The hang never ends, it will sit that way until I power down the card. The card itself is an Atlas-SOC DE0-Nano-SoC.

Any guidance is greatly appreciated.

cmartin · September 7, 2016, 3:18pm

If you perform a fdisk command on the sdcard in your Linux PC, do you have a Linux partition as the second partion (/dev/mmcblk0p2 or /dev/sdX2 where X is the drive letter)?

Also, it looks like there is a missing property in the device tree (.dts). The boot log shows this:
[ 0.153025] socfpga-reset ffd05000.rstmgr: /sopc@0/rstmgr@0xffd05000 missing #reset-cells property

This could cause the reset manager to not properly reset some of the peripherals. I don’t know if this is causing your issue, but it is worthy of a look-see.

lars915 · September 7, 2016, 3:54pm

It turns out that the problem was probably caused by a Linaro version conflict. The version expected in the tutorial is different than the version defaulted in the current Buildroot tool. I enabled “Download and Install” to accept the current Linaro version and the build succeeded.

cmartin · September 7, 2016, 5:38pm

That is good to know. Glad that it is working!

purusho2 · July 20, 2018, 8:04pm

Hi guys,

Bringing this issue back to the forefront. I have been struggling to get my custom HPS-FPGA example project running on the Arria 10 SoC Kit. I have just recently replaced the device tree binary file (.dtb) and have started getting the following error:

U-Boot 2014.10 (Jul 19 2018 - 14:00:21)

CPU : Altera SOCFPGA Arria 10 Platform
BOARD : Altera SOCFPGA Arria 10 Dev Kit
I2C: ready
DRAM: WARNING: Caches not enabled
SOCFPGA DWMMC: 0
FPGA: writing FLAT_HPS.rbf …
Full Configuration Succeeded.
DDRCAL: Success
INFO : Skip relocation as SDRAM is non secure memory
Reserving 2048 Bytes for IRQ stack at: ffe386e8
DRAM : 1 GiB
WARNING: Caches not enabled
MMC: *** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Model: SOCFPGA Arria10 Dev Kit
Skipped ethaddr assignment due to invalid EMAC address in EEPROM
Net: Phy not found
PHY reset timed out
dwmac.ff800000
Error: dwmac.ff800000 address not set.

Hit any key to stop autoboot: 0
FPGA must be in Early Release mode to program core.
fpga - loadable FPGA image support

** Unable to read file u-boot.scr **
4099376 bytes read in 191 ms (20.5 MiB/s)
19865 bytes read in 6 ms (3.2 MiB/s)
FPGA BRIDGES: enable
Fail: noc_idleack = 0x01110000 mask_noc = 0x01010111
Kernel image @ 0x008000 [ 0x000000 - 0x3e8d30 ]

Flattened Device Tree blob at 00000100

Booting using the fdt blob at 0x000100
Loading Device Tree to 01ff8000, end 01fffd98 … OK

Starting kernel …

[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Initializing cgroup subsys cpuset
[ 0.000000] Linux version 4.1.33-ltsi-altera (esv@eswdmz3) (gcc version 5.2.1 20151005 (Linaro GCC 5.2-2015.11-2) ) #1 SMP Mon Oct 30 10:14:22 PDT 2017
[ 0.000000] CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=10c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine model: Altera SOCFPGA Arria 10
[ 0.000000] cma: Reserved 16 MiB at 0x3f000000
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] PERCPU: Embedded 12 pages/cpu @eefcd000 s19712 r8192 d21248 u49152
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260624
[ 0.000000] Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait
[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Memory: 1014024K/1048576K available (6278K kernel code, 431K rwdata, 1668K rodata, 420K init, 159K bss, 18168K reserved, 16384K cma-reserved, 253952K highmem)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
[ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB)
[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
[ 0.000000] .text : 0xc0008000 - 0xc07cab88 (7947 kB)
[ 0.000000] .init : 0xc07cb000 - 0xc0834000 ( 420 kB)
[ 0.000000] .data : 0xc0834000 - 0xc089fda0 ( 432 kB)
[ 0.000000] .bss : 0xc089fda0 - 0xc08c7d90 ( 160 kB)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] Additional per-CPU info printed with stalls.
[ 0.000000] NR_IRQS:16 nr_irqs:16 16
[ 0.000000] L2C: platform modifies aux control register: 0x72460001 -> 0x72560001
[ 0.000000] L2C: device tree omits to specify unified cache
[ 0.000000] L2C: platform provided aux values permit register corruption.
[ 0.000000] L2C: DT/platform modifies aux control register: 0x72460001 -> 0x72560001
[ 0.000000] L2C-310 erratum 769419 enabled
[ 0.000000] L2C-310 enabling early BRESP for Cortex-A9
[ 0.000000] L2C-310: enabling full line of zeros but not enabled in Cortex-A9
[ 0.000000] L2C-310 ID prefetch enabled, offset 1 lines
[ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled
[ 0.000000] L2C-310 cache controller enabled, 8 ways, 512 kB
[ 0.000000] L2C-310: CACHE_ID 0x410030c9, AUX_CTRL 0x76560001
[ 0.000000] clocksource timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 38225208935 ns
[ 0.000004] sched_clock: 32 bits at 50MHz, resolution 20ns, wraps every 42949672950ns
[ 0.000219] Console: colour dummy device 80x30
[ 0.000236] Calibrating delay loop… 2387.14 BogoMIPS (lpj=11935744)
[ 0.059864] pid_max: default: 32768 minimum: 301
[ 0.059937] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.059945] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.060365] CPU: Testing write buffer coherency: ok
[ 0.060388] ftrace: allocating 20950 entries in 62 pages
[ 0.082267] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.082447] Setting up static identity map for 0x8280 - 0x82d8
[ 0.139884] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.139936] Brought up 2 CPUs
[ 0.139948] SMP: Total of 2 processors activated (4780.85 BogoMIPS).
[ 0.139952] CPU: All CPU(s) started in SVC mode.
[ 0.140305] devtmpfs: initialized
[ 0.140617] device-tree: Duplicate name in base, renamed to “clocks#1”
[ 0.143418] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[ 0.143611] clocksource jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.145151] NET: Registered protocol family 16
[ 0.146461] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.149702] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 0.149712] hw-breakpoint: maximum watchpoint size is 4 bytes.
[ 0.181795] vgaarb: loaded
[ 0.181981] SCSI subsystem initialized
[ 0.182194] usbcore: registered new interface driver usbfs
[ 0.182240] usbcore: registered new interface driver hub
[ 0.182290] usbcore: registered new device driver usb
[ 0.182770] pps_core: LinuxPPS API ver. 1 registered
[ 0.182778] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti giometti@linux.it
[ 0.182800] PTP clock support registered
[ 0.182945] FPGA manager framework
[ 0.183960] Switched to clocksource timer
[ 0.207200] NET: Registered protocol family 2
[ 0.207649] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.207702] TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
[ 0.207783] TCP: Hash tables configured (established 8192 bind 8192)
[ 0.207842] UDP hash table entries: 512 (order: 2, 16384 bytes)
[ 0.207880] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[ 0.208032] NET: Registered protocol family 1
[ 0.208326] RPC: Registered named UNIX socket transport module.
[ 0.208333] RPC: Registered udp transport module.
[ 0.208337] RPC: Registered tcp transport module.
[ 0.208341] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.208706] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
[ 0.209270] futex hash table entries: 512 (order: 3, 32768 bytes)
[ 0.216886] NFS: Registering the id_resolver key type
[ 0.216918] Key type id_resolver registered
[ 0.216923] Key type id_legacy registered
[ 0.216968] ntfs: driver 2.1.32 [Flags: R/W].
[ 0.217194] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[ 0.217912] bounce: pool size: 64 pages
[ 0.217925] io scheduler noop registered (default)
[ 0.220733] dma-pl330 ffda1000.dma: Loaded driver for PL330 DMAC-341330
[ 0.220748] dma-pl330 ffda1000.dma: DBUFF-512x8bytes Num_Chans-8 Num_Peri-32 Num_Events-8
[ 0.223166] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
[ 0.224092] console [ttyS0] disabled
[ 0.224128] ffc02100.serial: ttyS0 at MMIO 0xffc02100 (irq = 29, base_baud = 3125000) is a 16550A
[ 0.809101] console [ttyS0] enabled
[ 0.813777] brd: module loaded
[ 0.817998] CAN device driver interface
[ 0.822305] usbcore: registered new interface driver usb-storage
[ 0.828587] mousedev: PS/2 mouse device common for all mice
[ 0.834388] i2c /dev entries driver
[ 0.838277] watchdog: Invalid min and max timeout values, resetting to 0!
[ 0.845303] watchdog: Invalid min and max timeout values, resetting to 0!
[ 0.852265] Synopsys Designware Multimedia Card Interface Driver
[ 0.858403] dw_mmc ff808000.flash: IDMAC supports 32-bit address mode.
[ 0.864984] dw_mmc ff808000.flash: Using internal DMA controller.
[ 0.871053] dw_mmc ff808000.flash: Version ID is 270a
[ 0.876127] dw_mmc ff808000.flash: DW MMC controller at irq 31, 32 bit host data width, 1024 deep fifo
[ 0.885428] dw_mmc ff808000.flash: No vmmc regulator found
[ 0.890888] dw_mmc ff808000.flash: No vqmmc regulator found
[ 0.933861] dw_mmc ff808000.flash: 1 slots initialized
[ 0.939131] ledtrig-cpu: registered to indicate activity on CPUs
[ 0.945292] usbcore: registered new interface driver usbhid
[ 0.950837] usbhid: USB HID core driver
[ 0.954835] socfpga_a10_fpga_manager ffd03000.fpgamgr: no clock specified
[ 0.961637] socfpga_a10_fpga_manager: probe of ffd03000.fpgamgr failed with error -2
[ 0.969818] oprofile: using arm/armv7-ca9
[ 0.974504] NET: Registered protocol family 10
[ 0.979512] sit: IPv6 over IPv4 tunneling driver
[ 0.984587] NET: Registered protocol family 17
[ 0.989030] NET: Registered protocol family 15
[ 0.993454] can: controller area network core (rev 20120528 abi 9)
[ 0.999655] NET: Registered protocol family 29
[ 1.004091] can: raw protocol (rev 20120528)
[ 1.008345] can: broadcast manager protocol (rev 20120528 t)
[ 1.013988] can: netlink gateway (rev 20130117) max_hops=1
[ 1.019595] 8021q: 802.1Q VLAN Support v1.8
[ 1.023805] Key type dns_resolver registered
[ 1.028117] ThumbEE CPU extension supported.
[ 1.032376] Registering SWP/SWPB emulation handler
[ 1.037904] of_cfs_init
[ 1.040389] of_cfs_init: OK
[ 1.044827] ttyS0 - failed to request DMA
[ 1.048866] Waiting for root device /dev/mmcblk0p2…

I have checked fdisk, as well as googled this question extensively. I am using the default kernel that came with the GSRD, as well as the GSRD rootfs. Finally, the project I am working with is a custom project beginner project that was recommended on this forum and am trying to program the FPGA and HPS.