Cyclone V: dwmac starts with incorrect capabilities

Hi,
I’m using a custom Cyclone V based board with Linux based on socfpga-4.12.

When booting, one of the HPS MACs start with incorrect capabilities.

The problem seems to be that an incorrect chip ID is read during boot in dwmac1000_setup().

The MAC that get correct capabilities read out hwid 0x1037 which produces:

stmmac - user ID: 0x10, Synopsys ID: 0x37

However, the MAC that get incorrect capabilities read out hwid 0, which
makes synopsys_id become ‘0’ which disables features that require 3.70, e.g.

RX Mitigation via HW Watchdog Timer
extended descriptors
IEEE 1588-2008 Advanced Timestamp

dwmac1000_setup() is called immediately after reset_control_deassert() so I added an udelay(5) before reading out chip ID and then it seems to work as expected.

Is anyone else seeing this problem or do I have a config problem?

/Thomas


libphy: Fixed MDIO Bus: probed
socfpga-dwmac ff700000.ethernet: PTP uses main clock
hwid 0x0 <-------------------------
socfpga-dwmac ff700000.ethernet: Ring mode enabled
socfpga-dwmac ff700000.ethernet: DMA HW capability register supported
socfpga-dwmac ff700000.ethernet: Enhanced/Alternate descriptors
socfpga-dwmac ff700000.ethernet: Extended descriptors not supported <-------------
socfpga-dwmac ff700000.ethernet: RX Checksum Offload Engine supported
socfpga-dwmac ff700000.ethernet: COE Type 2
socfpga-dwmac ff700000.ethernet: TX Checksum insertion supported
libphy: stmmac: probed
socfpga-dwmac ff700000.ethernet (unnamed net_device) (uninitialized): PHY ID 002
21622 at 7 IRQ POLL (stmmac-0:07) active
socfpga-dwmac ff702000.ethernet: PTP uses main clock
hwid 0x1037
stmmac - user ID: 0x10, Synopsys ID: 0x37
socfpga-dwmac ff702000.ethernet: Ring mode enabled
socfpga-dwmac ff702000.ethernet: DMA HW capability register supported
socfpga-dwmac ff702000.ethernet: Enhanced/Alternate descriptors
socfpga-dwmac ff702000.ethernet: Enabled extended descriptors
socfpga-dwmac ff702000.ethernet: RX Checksum Offload Engine supported
socfpga-dwmac ff702000.ethernet: COE Type 2
socfpga-dwmac ff702000.ethernet: TX Checksum insertion supported
socfpga-dwmac ff702000.ethernet: Enable RX Mitigation via HW Watchdog Timer <---------
libphy: stmmac: probed
socfpga-dwmac ff702000.ethernet (unnamed net_device) (uninitialized): PHY ID 002
21622 at 7 IRQ POLL (stmmac-1:07) active