Cyclone V: Preloader and Bootloader, the new workflow since SoC EDS Standard version 19.1

Boot
1

Question: How do I create the same files (preloader-mkpimage.bin,u-boot.img) with 19.1 as with the previous version 18.1?

Until SoC EDS Standard version 18.1 I always used workflow below:
Link: https://rocketboards.org/foswiki/Documentation/GSRDPreloader
Tools Version(s):
17.0std, 17.1std, 18.0std, 18.1std, 17.0std, 17.1std, 18.0std, 18.1std
Result of workflow:
The following files are built in the ~/cv_soc_devkit_ghrd/software/spl_bsp/ folder:
File Description
uboot-socfpga/spl/u-boot-spl Preloader ELF file
uboot-socfpga/spl/u-boot-spl.bin Preloader binary file
preloader-mkpimage.bin Preloader image with the BootROM required header

Since SoC EDS Standard version 19.1 is this workflow no longer supported, instead you should use the following workflow:
Link: https://rocketboards.org/foswiki/Documentation/BuildingBootloader?validation_key=abd52cc6cb5396a493456fd23700aca8
Building Bootloader
Building latest bootloaders for SoC FPGA devices
13 Apr 2020 - 18:47 | Version 70 | Radu Bacrau | Agilex, Arria 10, Arria V, Cyclone V, SPL, SoC, Stratix 10, bootloader, u-boot
Since SoC EDS Pro version 19.3 and SoC EDS Standard version 19.1,
Cyclone V SoC - Boot from SD Card
B. Build U-Boot
The following files will be built in the $TOP_FOLDER/cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga folder:
Result:
File Description
spl/u-boot-spl SPL ELF executable
u-boot U-Boot ELF executable
u-boot-with-spl.sfp Bootable file: four copies of SPL and one copy on U-Boot image

Question: How do I create the same files (preloader-mkpimage.bin,u-boot.img) with 19.1 as with the previous version 18.1???
I tried u-boot-with-spl.sfp, but it don’t work !! Booting not possible!!!
U-Boot SPL 2019.04-00268-g6296fdb7da-dirty (Apr 14 2020 - 18:12:01 +0200)
Trying to boot from MMC1

U-Boot 2019.04-00268-g6296fdb7da-dirty (Apr 14 2020 - 18:12:01 +0200)

CPU: Altera SoCFPGA Platform
FPGA: Altera Cyclone V, SE/A5 or SX/C5 or ST/D5, version 0x0
BOOT: SD/MMC Internal Transceiver (3.0V)
Watchdog enabled
DRAM: 1 GiB
MMC: dwmmc0@ff704000: 0
Loading Environment from MMC… OK
In: serial
Out: serial
Err: serial
Model: Altera SOCFPGA Cyclone V SoC Development Kit
Net: eth0: ethernet@ff702000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1…
unrecognized JEDEC id bytes: ff, ff, ff
Failed to initialize SPI flash at 0:0 (error -2)
No SPI flash selected. Please run sf probe' No SPI flash selected. Please run sf probe’
starting USB…
USB0: scanning bus 0 for devices… 2 USB Device(s) found
scanning usb for storage devices… 0 Storage Device(s) found
Speed: 1000, full duplex
BOOTP broadcast 1
BOOTP broadcast 2

2

I followed the Building Bootloader instructions for Cyclone V SoC - Boot from SD Card. When I boot the SD card I see similar results until after the line that says, "Scanning mmc 0.1…

I get this:
Scanning mmc 0:1…
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
157 bytes read in 1 ms (153.3 KiB/s)
1: Linux Default
Retrieving file: /extlinux/…/zImage
5083992 bytes read in 253 ms (19.2 MiB/s)
append: root=/dev/mmcblk0p2 rw rootwait earlyprintk console=ttyS0,115200n8
Retrieving file: /extlinux/…/socfpga_cyclone5_socdk.dtb
26612 bytes read in 3 ms (8.5 MiB/s)

Flattened Device Tree blob at 02000000

Booting using the fdt blob at 0x2000000
Loading Device Tree to 03ff6000, end 03fff7f3 … OK

Starting kernel …

The first time I tried to make the SD card, I messed up the step, Prepare FAT Partition, and I was unable to boot my system.

I am stuck now is figuring out what to add to this new workflow to be able to load an .rbf file into the FPGA.

3

I get these same errors when I try to boot.

With the 2019.1 workflow, I used to be able to get it to boot into Linux, but now since the guide was updated in April, I haven’t been able to get it to boot into Linux.

Here is my log. My only guess is that it is a problem with my HPS config in Platform Designer, but given others are having problems, I have my doubts about that.

U-Boot SPL 2019.10-02866-ge151fde377-dirty (Apr 19 2020 - 11:17:58 -0400)
Trying to boot from MMC1

U-Boot 2019.10-02866-ge151fde377-dirty (Apr 19 2020 - 11:17:58 -0400)

CPU: Altera SoCFPGA Platform
FPGA: Altera Cyclone V, SE/A5 or SX/C5 or ST/D5, version 0x0
BOOT: SD/MMC Internal Transceiver (3.0V)
Watchdog enabled
DRAM: 1 GiB
MMC: dwmmc0@ff704000: 0
Loading Environment from MMC… *** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Model: Altera SOCFPGA Cyclone V SoC Development Kit
Net: Could not get PHY for ethernet@ff702000: addr -1
eth-1: ethernet@ff702000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1…
28016 bytes read in 6 ms (4.5 MiB/s)
unrecognized JEDEC id bytes: 00, 00, 00
Failed to initialize SPI flash at 0:0 (error -2)
No SPI flash selected. Please run sf probe' No SPI flash selected. Please run sf probe’
starting USB…
Bus usb@ffb40000: Port not available.
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: pxeuuid
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/00000000
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/0000000
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/000000
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/00000
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/0000
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/000
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/00
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/0
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/default-arm-socfpga-cyclone5-socdk
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/default-arm-socfpga
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/default-arm
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/default
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
Could not get PHY for ethernet@ff702000: addr -1
No ethernet found.
Could not get PHY for ethernet@ff702000: addr -1
Config file not found
starting USB…
Bus usb@ffb40000:

4

When I first tried the April 13 workflow, I didn’t seem to have a Linux that would load. I noticed that the instructions were slightly different for the Cyclone V, under the section, Building Yocto Rootfs. It was missing the step:

echo ‘BBLAYERS += " ${TOPDIR}/…/meta-altera "’ >> conf/bblayers.conf

The other FPGAs had that step right before the bitbake step.

I just noticed that Building Bootloader was updated on April 17. I am going to go through it again and see what happens.