I was about to say that I highly doubt is possible to re-route HPS IO to FPGA, but then I found this:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an706.pdf
This application note describes the steps required to route an HPS peripheral through the FPGA interface
using Platform Designer (Standard) and Intel®
Quartus®
Prime Standard Edition software. A simple
design example is included to demonstrate exporting HPS EMAC0 and I2C0 peripheral signals to the
FPGA interface using a Cyclone V SoC Development Kit
Good luck! 