DE0-Nano-SoC: How HPS(ARM) recognizes f2h_irq0 or f2h_irq1 interrupts from FPGA

1

I designed a block in Verilog. When data processing is finished, this FPGA block sends an interrupt signal to HPS using one of dedicated interrupt line: f2h_irq0 or f2h_irq1. The question is how HPS can recognize that this interrupt is active? Could anybody give an example of C code where HPS reads the interrupt (or decode interrupt vector) from FPGA?

2

Hi Seb,
Is a Linux running on the HPS? In this case, your software need to register the selected interrupt line.
I did this in a kernel module with the request_irq(...) function.
This function has (amongst other things) a parameter with a function pointer to your interrupt handle function and a parameter with the interrupt number. I define the interrupt number in my device tree blob which must match with the interrupt line defined in QSYS…

3

Hi schnudi,

would you please show us some example code for interrupt registration and handle?
Thanks!

4

Hi schnudi/seb,

Our application use case is also to handle the same interrupts f2h_irq0 or f2h_irq1.in linux on HPS side
Is there any example code available.?
Any help is greatly appreciated.

5

Hello,

I have recently written a simple linux kernel driver for non-blocking polling of the interrupts from a userspace app:

https://gist.github.com/vrbadev/0850428601283986f27221f16ee5ceba

Hope this helps anyone seeking answers.