I am trying to build Device Tree Blob for my DE1-SoC board according to the instructions outlined in Altera Workshop. However, I could not find the _board_info.xml files online (hps_common_board_info.xml and DE1_SoC_board_info.xml) used in Device Tree Generator.
I contacted Terasic and they sent me these two files (Here), but the file soc_system_board_info.xml does not seem to have complete information about the board, it only describes the board model with no details about peripherals at all!
I contacted them again but they seem to be sure of what they sent.
Still, I am not convinced yet! In comparison with other boards XML files, this one is useless!
Can you please confirm that?
Hi, I’m not sure, but maybe this information is helpfully for you:
The ghrd include a basically xml file. In the folder from your EDS should be an example project which including the xml files. (In the path something like this: C:\altera\13.1\embedded\examples\hardware\cv_soc_devkit_ghrd)
By changing the Hardware in Quartus/qsys you should change the xml file manually and rebuild the device tree source and device tree blob.
Thank you for your reply.
I am aware of these XML files in EDS. But I thought they are specific to Altera Cyclone V Board, isn’t it?
Or these files are generic and can be used with all Cyclone V boards?
To generate the own dtb, the altera EDS includes some usefully tools.
With the “sopc2dts” command, you can create your own dts. This tool includes the two *.xml files which we talked about and furthermore one *.sopcinfo file.
The *.sopcinfo files is generated by quartus. I think this file includes the design specific hardware information / devices. (e.g. number and location of UART interfaces and so on)
In the *.xml you need to define which kernel driver should be loaded for which device.
Finally, generate the dtb with dtc (device tree compiler) also from the altera EDS.
What I found out until now: Between the kernel 3.16 and 3.17 they changed something in the kernel driver for the fpga bridges.
When I build the kernel 3.17 with the old altera-hps2fpga.c file from kernel 3.16, all thing runs with the self builded dtb.
I use the arrow development board. Maybe its similar with the DE1-SoC. So if it helpful for you, I can send you my xml files, dts and dtb.
The problem is, that my dtb work fine with the kernel 3.16 but not with the kernel 3.10. So now, I try to reduce the step between the kernel version and find out the changes which have this impact.
Thanks also @Victor for the answer in my post. I think this can help me to find this problem.
Could you let me know if you made any progress with generating a working dtb file for the DE1-SoC board using a kernel >= 3.17? I’m at the stage where using Quartus 15.0 I could generate a dtb file using the de1_soc reference design and the files
sirajmuhammad received from Terasic. Although the board boots with 3.17 it has no network support. I’m also struggling to see how the dtb file is made Linux kernel specific?
After compiling your kernel, check this directory: /arch/arm/boot/dts copy these three files:
Now from the Embedded Command Shell, compile these files into a single .dtb file:
dtc -I dts -O dtb -o socfpga.dtb socfpga_cyclone5.dts
Copy the generated socfpga.dtb to your SD card and you should be able to boot kernel.
I tried this with kernel version 3.10-ltsi, and I think all kernel versions come with .dts files.
Note that you should edit .dts files according to the implemented hardware design. Usually, sopc2dts tool should do that but I have not been able to get any bootable .dtb file using it. XML files that I have attached (which Terasic sent me) are not valid at all! Maybe they suppose the developer to edit DTS files by hand.
please can you tell me how can i boot an RTOS on SD card to install in DE1 Soc without linux, I must have the control console of the kernel on VGA directly so that I can program after a machine control interface;
thank’s for you