DE10-Nano U-boot-socfpga: Enable bridges lwhps2fpga

Thanks for this. I’ve been bashing my head against a wall trying to get the Intel TSE in fabric working from the HPS and wondering why I could not access the control registers through the LW H2F bridge, had assumed it was the TSE in reset or not clocked properly.

Given that the Quartus handoff file does seem to indicate that the LW H2F bridge is in use by way of the “init-val = <1>” property in the “hps_fpgabridge1” entry (even if it does not automatically populate the TSE device tree node), is there any sensible reason why u-boot does not automatically enable these bridges as part of its start up, just like it does for the hard peripherals?

The reset_manager.c source includes the socfpga_reset_deassert_bridges_handoff() to do this based on the device tree properties, but this is only run as a result of calling the cli “bridge enable” command. Having to create a script to enable the bridges through the cli before booting Linux seems odd. It also means you can’t use something like the TSE from u-boot as its already gone past the Net configure step and failed before it gets to the interactive (or scripted) u-boot prompt.