Hi,
I have been following tutorials provided by EBV to make a simple SoC system, where I’m using Parallel IO via Lightweight H2F Interface. Quartus compiles alright, programs get uploaded, Linux boots fine with appropriate preloader, but when I’m trying to use program called ‘devmem2’ to flash user LEDs on the board I keep getting errors.
root@socrates:/home/training# ./devmem2 0xFF200000 w 0x1
/dev/mem opened.Unhandled fault: external abort on non-linefetch (0x018) at 0x76f6a000
Memory mapped at address 0x76f6a000.
Bus error
Any idea how to get the LEDs flashing? I’ve generated the SD card using the script found here.
On first sight, it looks like the Lightweight H2F Interface bridge is not enabled it HPS.
In Qsys I’ve enabled both H2F and H2F Lightweight as 32-bit, so that shouldn’t be the problem.
Are you sure you assigned correct addresses for the Parallel IO in Qsys?
I’ve assigned 0x0000_0000 - 0x0000_000f for the Led PIO.
Did you use the same addresses when accessing the PIO from Linux?
I understood that FPGA slaves for the LW H2F bridge have base address of 0xFF200000 in Cyclone 5 SoC. And since my LED PIO base address is 0x0000_0000 I should be able to access it with 0xFF200000, shouldn’t I?
That’s correct.
Please check the status of the LW bridge from linux:
cat /sys/class/fpga-bridge/lwhps2fpga/enable
If you get 1, it’s enabled, else you need to enable the bridge from U-Boot.
I did the following:
root@socrates:~# cat /sys/class/fpga-bridge/lwhps2fpga/enable
0
root@socrates:~# echo 1 > /sys/class/fpga-bridge/lwhps2fpga/enable
root@socrates:~# cat /sys/class/fpga-bridge/lwhps2fpga/enable
1
root@socrates:/home/training# ./devmem2 0xFF200000 w 1
/dev/mem opened.
It now just stucks there…
To the best of my knowledge, you cannot enable the bridges just like that. You need to do so from U-Boot. Search for it in Rocketboards.
Hi!!!
So!! first you can enable your bus @ your device tree…ADD
fpgabridge1: fpgabridge@1 { /* LWHPS2FPGA Bridge /
compatible = “altr,socfpga-lwhps2fpga-bridge”;
resets = <&rstmgr 97>; / check this name at your devicetree /
reset-names = “lwhps2fpga”;
label = “lwhps2fpga-bridge”;
clocks = <&l4_main_clk>; / check this name at your devicetree /
init-val = <1>; / enable bridge at boot */
}; //end fpgabridge1
Then … your problem look like
http://comments.gmane.org/gmane.linux.ports.arm.kernel/26878
I also think devmem2 is not the rigth way to R/W mem addresses from userspace.
I think its better if you write a simple c program to R/W addrs! Use
mmap
example:
fd_mem = open("/dev/mem",O_RDWR);
test_pio = (uint32_t*) mmap(NULL,block_length_to_map,(PROT_READ|PROT_WRITE), MAP_SHARED,fd_mem,LWHPS2FPGA) /LWHPS2FPGA = 0xFF200000/
bye
I managed to enable the bridges and configure FPGA from Linux. Leds are working now like a charm. Thanks for the tips. And this helped: http://rocketboards.org/foswiki/view/Documentation/GSRD131ProgrammingFPGA#FPGA_Configuration_from_Preloader
Important is to flash proper FPGA image before kernel is booting. During debugging sessions to be sure just reboot linux after FPGA programming. In final design FPGA can be programmed from preloader as You actually found out. Also important to check for adress conflicts and overlaps in Qsys.
To verify memory mapped devices without linux you can add “Jtag to avalon master bridge” to your Qsys system and connect its “master” to “s1” of your LED PIO. Then you can use System console to write data to LED PIO (using master_write_8 command). By doing this you can be sure FPGA site is working.