Expanding SDRAM on Cyclone V

I have a running linux system based on rsyocto on my Cyclone V FPGA. It currently have 128 MB of memory, so I “just” want to upgrade it to 1024 MB. So I have got a pin compatible memory with the extra address lines routed to the FPGA (using 16 row addresses instead of 13)

I think that I have succesfully modified the device-tree in u-boot, since it expect it to be 1024 MB. But when u-boot runs a sanity check, which is a memory test (writing at an address of each address line (2^n), it only finds 128 MB of memory. (The memory test function is called get_ram_size() and is called from sdram_gen5.c/altera_gen5_sdram_probe() )

I did not create the original configuration, so I have not recreated the auto-generated files from the bsp-editor, I have only modified the address row width manually. (I have not found the bsp-editor for linux and the windows bsp-editor output have a lot of difference that I do not want)

Is there anything I have to do to get physical contact with the full memory?

I’m trying to understand how it works, but almost all documentation just tells me which steps to take so it is difficult to understand what to do if something goes wrong.

I assume that system tries to use the address lines if they are routed, but it seem to be otherwise. Do I need an FPGA image loaded for the SDRAM to work, or should it be sufficient with the information in the HPS / u-boot? (I could run the old 128MB system without FPGA image).

Is there anything obvious that I’m missing?