Flush memory region for cache-coherency

How a memory, allocated using __get_free_pages() and then mapped to user-space using ‘mmap’, could be flushed/invalidated before using DMA (FPGA) for data transfer?

A bit late for the reply but in general you’d want to implement the cache invalidation from kernel space, not userland. Userland code shouldn’t have to worry about cache coherency, DMA and such things if at all possible.

For instance you’d map your buffer in userland, fill it with your data and when your done use an ioctl or similar to tell the driver to handle the transfer to the FPGA.

For DMA you’ll probably want to use the Linux kernel DMA API which will take care of the details for you. The documentation in the kernel source tree (Documentation/DMA-API*) is a good starting point.

Thanks Lionel for reply.
In past I did explore DMA-API documentation and tried out APIs and guidelines. But none of the DMA APIs seems to be working except dma_alloc_coherent() API. Memory blocks obtained through this API, though helps in coherency, but don’t seem to cacheable resulting in increased memory latency for HPS access. APIs like dma_sync_single_for_device(), dma_map_area() doen’t help in maintaining coherency.

Is it must to have FPGA master (to HPS) to go through ACP bridge?
If you have any C examples and can share, it will be great help.