Fpga configuration

#1

I have copied Linux SD Card Image provided by my Board Supplier (TERASIC) on my sd card. I then copied my fpga configuration soc_system.rbf file on my sd card. The Linux boots up succesfully. But FPGA is not configured. How can I configure my FPGA from this soc_system.rbf file?

#2

Hello,
Did you put the .rbf in the right partition of the card?
On windows, this partition can sometimes not be seen as it is not FAT32. (I had this issue with my board.)
Normally, you should have seen the standard “terasic” .rbf and have replaced it, i think with an .rbf that should have the same name as the original one, but of that I am not 100% sure.
Best Regards,
Johi.

#3

Hello @Muhammad_Atif,
the problem would be at position of the switches at Your board. RBF files of Terasic use compression and if You create Your RBF file without compression (whitch is set as default), the FPGA could not be configured by U-Boot, configuration is simply skipped and Linux kernel is called. In such case You can observe error message from U-Boot with error code -4 (at serial link).
The necessary position of switches are described at RocketBoards at the page of the board You are using.
Best wishes.
Jan Konečný.

#4

Hi Johi,
Sorry I was quite ill so couldn’t reply you.
Do you mean that I shouldn’t copy the .rbf file onto the FAT32? Can you please tell me which partition I am supposed to have because I remember that whenever I format my SD card on windows, I format it using FAT or exFAT file system. Is that a problem?
Second, I see the standard terasic.rbf file which is named as soc_system.rbf file which I replace with my file with the same name. You can also find figures where you can see that where I am putting my files …

#5

Hi JanKonecny,
thanks for your message and sorry for late reply because I was ill so couldn’t reply fast.
Yes, I am using compressed RBF file and with the correct FPGA configuration switches on my board. That is why I am also surprised because everything seems fine but fpga is still not able to be configured. Below is the output at my serial link. It always stucks at blinking light LPD server.

 0

reading u-boot.scr
205 bytes read in 5 ms (40 KiB/s)

Executing script at 02000000

reading soc_system.rbf
7007184 bytes read in 2378 ms (2.8 MiB/s)
’ - try 'help’d ’
’ - try 'help’d ’
fpgaintf
ffd08028: 00000000 …
fpga2sdram
ffc25080: 00000000 …
axibridge
ffd0501c: 00000000 …
’ - try 'help’d ’
reading zImage
3202824 bytes read in 1088 ms (2.8 MiB/s)
reading socfpga.dtb
18033 bytes read in 14 ms (1.2 MiB/s)
’ - try 'help’d ’

Flattened Device Tree blob at 00000100

Booting using the fdt blob at 0x00000100
Loading Device Tree to 03ff8000, end 03fff670 … OK

Starting kernel …

Booting Linux on physical CPU 0x0
Initializing cgroup subsys cpuset
Linux version 3.9.0 (jdasilva@sj-interactive3) (gcc version 4.7.3 20121106 (prer elease) (crosstool-NG linaro-1.13.1-4.7-2012.11-20121123 - Linaro GCC 2012.11) ) #1 SMP Fri Sep 27 22:55:43 PDT 2013
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: Altera SOCFPGA, model: Altera SOCFPGA Cyclone V
Memory policy: ECC disabled, Data cache writealloc
PERCPU: Embedded 8 pages/cpu @80eb0000 s11328 r8192 d13248 u32768
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096
Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
__ex_table already sorted, skipping sort
Memory: 1024MB = 1024MB total
Memory: 1032648k/1032648k available, 15928k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xc0800000 - 0xff000000 (1000 MB)
lowmem : 0x80000000 - 0xc0000000 (1024 MB)
modules : 0x7f000000 - 0x80000000 ( 16 MB)
.text : 0x80008000 - 0x805ede10 (6040 kB)
.init : 0x805ee000 - 0x8062ec40 ( 260 kB)
.data : 0x80630000 - 0x8066a498 ( 234 kB)
.bss : 0x8066a498 - 0x806a2c80 ( 226 kB)
SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
Hierarchical RCU implementation.
NR_IRQS:16 nr_irqs:16 16
smp_twd: clock not found -2
sched_clock: 32 bits at 100MHz, resolution 10ns, wraps every 42949ms
Console: colour dummy device 80x30
Calibrating delay loop… 1594.16 BogoMIPS (lpj=7970816)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
ftrace: allocating 16244 entries in 48 pages
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Calibrating local timer… 199.89MHz.
Setting up static identity map for 0x8045a520 - 0x8045a578
CPU1: Booted secondary processor
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated (3188.32 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
L310 cache controller enabled
l2x0: 8 ways, CACHE_ID 0x410030c9, AUX_CTRL 0x32460000, Cache size: 524288 B
syscon ffd08000.sysmgr: syscon regmap start 0xffd08000 end 0xffd0bfff registered
syscon ffd05000.rstmgr: syscon regmap start 0xffd05000 end 0xffd05fff registered
syscon ff800000.l3regs: syscon regmap start 0xff800000 end 0xff800fff registered
syscon ffc25000.sdrctl: syscon regmap start 0xffc25000 end 0xffc25fff registered
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
bio: create slab at 0
FPGA Mangager framework driver
fpga bridge driver
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
lcd_load_custom_fonts: i2c_master_send returns -121
lcd_cmd_no_params: i2c_master_send returns -121
lcd_cmd_one_param: i2c_master_send returns -121
lcd_cmd_no_params: i2c_master_send returns -121
lcd-comm 0-0028: LCD driver initialized
Switching to clocksource timer
NET: Registered protocol family 2
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP: reno registered
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
arm-pmu arm-pmu: PMU:CTI successfully enabled
NFS: Registering the id_resolver key type
Key type id_resolver registered
Key type id_legacy registered
NTFS driver 2.1.30 [Flags: R/W].
jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
msgmni has been set to 2016
io scheduler noop registered (default)
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
ffc02000.serial: ttyS0 at MMIO 0xffc02000 (irq = 194) is a 16550A
console [ttyS0] enabled
altera_fpga_manager ff706000.fpgamgr: fpga manager [Altera FPGA Manager] registe red as minor 0
brd: module loaded
at24 0-0051: 4096 byte 24c32 EEPROM, writable, 32 bytes/write
altera_hps2fpga_bridge fpgabridge.2: fpga bridge [hps2fpga] registered as device hps2fpga
altera_hps2fpga_bridge fpgabridge.3: fpga bridge [lshps2fpga] registered as devi ce lwhps2fpga
altera_hps2fpga_bridge fpgabridge.4: fpga bridge [fpga2hps] registered as device fpga2hps
cadence-qspi ff705000.flash: master is unqueued, this is deprecated
m25p80 spi2.0: n25q00 (131072 Kbytes)
2 ofpart partitions found on MTD device spi2.0
Creating 2 MTD partitions on “spi2.0”:
0x000000000000-0x000000800000 : “Flash 0 Raw Data”
0x000000800000-0x000001000000 : “Flash 1 jffs2 Filesystem”
cadence-qspi ff705000.flash: Cadence QSPI controller driver
stmmac - user ID: 0x10, Synopsys ID: 0x37
DMA HW capability register supported
Enhanced/Alternate descriptors
RX Checksum Offload Engine supported (type 2)
TX Checksum insertion supported
Enable RX Mitigation via HW Watchdog Timer
libphy: stmmac: probed
eth0: PHY ID 00221611 at 1 IRQ 0 (stmmac-0:01) active
Initializing USB Mass Storage driver…
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
Using Slave mode
dwc_otg ffb40000.usb: DWC OTG Controller
dwc_otg ffb40000.usb: new USB bus registered, assigned bus number 1
dwc_otg ffb40000.usb: irq 160, io mem 0xffb40000
Init: Port Power? op_state=b_peripheral
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
mousedev: PS/2 mouse device common for all mice
i2c /dev entries driver
Synopsys Designware Multimedia Card Interface Driver
dwmmc_socfpga ff704000.flash: couldn’t determine pwr-en, assuming pwr-en = 0
dwmmc_socfpga ff704000.flash: Using internal DMA controller.
dwmmc_socfpga ff704000.flash: DW MMC controller at irq 171, 32 bit host data wid th, 1024 deep fifo
mmc_host mmc0: Bus speed (slot 0) = 12500000Hz (slot req 400000Hz, actual 390625 HZ div = 16)
dwmmc_socfpga ff704000.flash: 1 slots initialized
dwmmc_socfpga ff704000.flash: Version ID is 240a
platform leds.1: Driver leds-gpio requests probe deferral
ledtrig-cpu: registered to indicate activity on CPUs
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
oprofile: using arm/armv7-ca9
TCP: cubic registered
NET: Registered protocol family 17
NET: Registered protocol family 15
Key type dns_resolver registered
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
ThumbEE CPU extension supported.
Registering SWP/SWPB emulation handler
platform leds.1: Driver leds-gpio requests probe deferral
Waiting for root device /dev/mmcblk0p2…
dwmmc_socfpga ff704000.flash: data FIFO error (status=00000800)
mmc0: problem reading SD Status register.
mmc_host mmc0: Bus speed (slot 0) = 12500000Hz (slot req 12500000Hz, actual 1250 0000HZ div = 0)
mmc0: new high speed SDHC card at address 0001
mmcblk0: mmc0:0001 SD8GB 7.27 GiB
mmcblk0: p1 p2 p3
platform leds.1: Driver leds-gpio requests probe deferral
kjournald starting. Commit interval 5 seconds
EXT3-fs (mmcblk0p2): using internal journal
EXT3-fs (mmcblk0p2): recovery complete
EXT3-fs (mmcblk0p2): mounted filesystem with ordered data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
devtmpfs: mounted
Freeing init memory: 256K
INIT: version 2.88 booting
++OTG Interrupt: A-Device Timeout Change++
Starting Bootlog daemon: bootlogd.
Configuring network interfaces… eth0: device MAC address 8a:54:ba:a7:82:1d
platform leds.1: Driver leds-gpio requests probe deferral
udhcpc (v1.20.2) started
Sending discover…
Sending discover…
Sending discover…
No lease, failing
Starting portmap daemon…
Sun Sep 29 00:14:00 UTC 2013
INIT: Entering runlevel: 5
Starting OpenBSD Secure Shell server: sshd
NET: Registered protocol family 10
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
done.
Starting syslogd/klogd: done
Starting Lighttpd Web Server: lighttpd.

#6

Well, @Muhammad_Atif,
output of U-Boot seems me fain, even if You use a non-standart boot script, don’t You? Could You print it here too, please?
According to a screenshot above, original and new RBF files are of different sizes and the new one is of absolutelly same size as non-compressed RBF file. So, are You sure it is created in that way that You mean? Moreover, if You try toconfigure FPGA with the original RBF file (with only change its filename back to ‘soc_system.rbf’), do You success?
Best wishes…