FPGA for DSP on Adaptive Dynamic Vibration Absorber


I’m looking for some advice with regards to the digital platform I will use for a graduate school project. I have also posted this question on the Digilent forums, so my apologies if you frequent both.

Brief Project Overview
The aim of this project is to measure the dynamic response of a structure under artificial and/or operational stimulus, and semi-actively tune a dynamic vibration absorber to minimize said response.

My chosen methodology requires computing the FFT of multiple sensor signals, performing a simple search on the processed data, and then executing a decision making algorithm to select which frequency the dynamic vibration absorber is tuned to.

The worst-case scenario may require computing the real FFT of 4-6 signals over a running window of 1-2 seconds every 5-10ms, with a 24 bit ADC sampling at 10KHz. This is a bit of a contrived scenario, however useful for establishing an upper limit on the performance requirements.

The simplified diagram below illustrates roughly what the process will look like. It would be nice to have the response time from electromechanical system output, A, to input B less than 10ms.

My background
Degree(s) in mechatronics, some experience with the MSP430, and some experience with the DE1 SoC development board for course work. A few courses in digital design and computer science using C++.

Chosen Hardware…
This is where you come in. So far I’m leaning towards an FPGA + ARM development board with the addition of an ADC development board so I can get right to development. I’m leaning towards an FPGA, because I want to learn.

These options look attractive:

• DE10-Stanard ( ARM + FPGA )
• Altera Arrow SoCKit ( ARM + FPGA )
• Zedboard ( ARM + FPGA )
• NXP MIMXRT1050 ( MCU with some hardware acceleration )
• OMAP-L138 Development Kit ( ARM + DSP )

ADC Development Board:

AD7768 (beast)

MCU for Position Control
An MCU that can be dedicated solely to real time control of a single position axis. Likely using an absolute rotary encoder, or incremental encoder and limit switch for feedback. Output would be to a BLDC driver, or simple DC motor amplifier. Reference input would be received from the platform performing the DSP and decision making.

Any thoughts on an MCU development board for this job? I was thinking something from TI real time control like the C2000, or BBB and making use of the PRUs. Any suggestions are welcome. Eventually the control could be implemented on the FPGA, but for now I want to keep things modular for development.

Here’s where I need the most help…
Ideally I think I would go with the DE10-Standard because of the dedicated FPGA external RAM, however I’m leaning towards the Zedboard for the following reasons:

  • The embedded community seems more saturated with regards to Zedboard, and Xilinx support material and knowledge. Correct me if I’m wrong? But since most of my learning will be from googling, forums, and some digital design books, this seems the better route. I have no FPGA experts around me at the moment to ask questions.
  • The Zedboard can connect right up to the AD7768 development board via the FMC connector and I’ve seen a few forum posts on integrating the two boards.
  • I cannot find an equivalently powerful ADC development board for the DE10-Standard that would be easily implementable out of the box. There are a few HSMC adapter boards that might allow connecting to the AD7768 board, however I’m not ready to troubleshoot that setup, and learn a new platform. Thoughts?

I’m concerned about the Zedboard for the following reasons:

  • No dedicated RAM for the FPGA other than the 4.9Mb of block ram. If I’m buffering 4 signals at 10,000 samples/s for a capture length of 2 seconds, that’s cutting it really close for buffering. Especially if I want to store other processed data, and run a softcore MCU. Actually, it won’t all fit worst-case scenario. Any thoughts on this? This is why the DE10 seemed so attractive with it’s 64MB of SDRAM. Would it be reasonable to use the DDR3 RAM on the Zedboard’s processor side for buffering?
  • I would like to use the DE10 because the FPGA has direct access to dedicated external RAM, however I cannot find a high precision ADC dev board that will plug right in, and there doesn’t seem to be as much community support as there is for Xilinx and the Zedboard. If I had unlimited time, yeah I would go with the DE10-Standard board and stick it out, but there is also a bit of a time crunch (4-6 months). So getting started ASAP is also desirable.

My biggest concern is the memory required for continuously buffering the acquired signal. Any suggestions with regards to this? Will it be an issue?
Otherwise, any broader suggestions on my chosen platforms would be greatly appreciated! I’ve got lots to learn and I look forward to it. Also look forward to your responses. :wink:

Please let me know if you need any clarification. I realize I’ve been a bit hand wavy with the details and that’s probably from my lack of experience. Also, you may have noticed I’m just a little married to the idea of using the Zedboard + AD7768, likely because the hardware seems like it should work together, and the hardware setup should be relatively straight forward.


I ve hearded bad things from Intel(Altera) and Xilinx. I mean you will encounter problems on both. My opinion (I am Intel FPGA user) is that Intel programming tools (Qsys, compiler) are better but Xilinx devices always go a little bit ahead. There is indeed more xilinx community but, hey, here you have the intel community. Since you have already used Intel boards I would recommend Intel. Take the cheapest that can do the work. Zedboard is nice too. Almost equal to the DE1-SoC. I think your processing is not so big and can fit in any of those. Have you considered DE0-nano-SoC?. It has 10-bit ADC 500MS/s and its only like 90$.