fpga2hps Bridge

Heloo there,

I am trying to get acces to the EMAC registers from the FPGA. Currently i’m using the fpga2hps bridge with an address span extender. In the logic analyser, i can see that the right address is being selected, but when i look with Memtool in the memory, nothing is happening.
Has anyone, any idee how to access the the perhiperals in the HPS from the FPGA logic.


So youre trying to read one of the emac registers on the HPS [ emac0 (0xff700000) or emac1 (0xff702000)] right?
maybe you can try this:
First Write and generate a qsys component to read the emac registers! In your component you need a master avalon port.
In QSYS, enable (in the hps) the fpga2hps bridge with the right width!
connect your master avalon port with the HPS fpga2hps(slave) bus! Dont forget the clocks!
Use SignalTap II to verify your project! In signaltap dont forget to use the QSYS clock as main clock, try to trigger with the avalon read signal and dont forget to add the data bus in signal tapII!
Then just run and signal tap will trigger with the read signal and the rigth address and youll see the data on the bus!
I also have some questions!! why are you using the expander and when you say “logic analyser” is it a real (hardware) analyser or signaltapII (software)? And Memtool… where are you using memtool?
so thats it …hope it helps!!


Make sure to check that security is not set for the EMAC. You can modify the security registers here:


If security is enabled (enabled by default), then any FPGA master will not be able to access the peripheral directly.