General mis-understanding of access Memory Mapped Peripheral

I have a factory card (Reflex Achilles, target) with Arria 10 SoC FPGA. It has build-in U-boot and Linux (4.1.22-ltsi) on eMMC flash.
No FPGA configuration no Device trees of U-boot/Linux have no any HPS2FPGA bridge enabled.

  1. I wrote and compile a simple program set_led that:
  • opens “/dev/mem”
  • performs mmap to HPS2FPGA LW bridge (0xff200000)
  • writes 1/0 to memory with offset 0x100 - to Led.
    I loaded set_led to the target.
  1. When I run this set_led on the target, no any led is light.
  2. I configured the FPGA with a new SOF file, having HPS2FPGA LW bridge with Led connected to 0x100 offset.
    When I run this set_led on the target, the Led blinks!

So here time for my questions.
Q1. Does the access to Memory Mapped (MM) HPS2FPGA LW bridge not need any driver?
Q2. Can I access to MM registers without any device tree modification?
Q3. Can I access to HPS2FPGA bridge (0xC0000000) by the same ‘mmap’ way without device tree-s change?
Q4. We need to copy a working project based on Nios II, (bar-metall) to SoC.
The FPGA configuration has:

  • FPGA SPI (IP) that will be connected to HPS2FPGA LW bridge
  • FPGA memory region that will be connected to HPS2FPGA bridge

So my question is the same: can I access to the SPI/memory MM registers by
the same way (as in set_led) without device tree modification.
(Note: I found, that U-boot’s bootcmd command has “fpgabr 1” to enable the bridges)