GHRD 15.1 SW6 settings not available for Arrow Sockit Evaluation Board (5CSXFC6D6F31C8)

Hi all,
If you notice instructions for booting Linux using prebuild microSD card tutorial for Sockit GSRD 15.1, you will notice that FPGA configuration switch settings are instructed to be FPPx32:
Booting Linux from Prebuild MicroSD card for GSRD 15.1
The FPGA device on my Arrow Sockit board is 5CSXFC6D6F31C8 and for this device FPPx32 is not available. Even in Quaruts if you try to assign FPPx32 to this device, Quartus shows the message that this compression mode is not available for this device.
Any ideas is there any other GSRD available for Arrow sockit based upon FPPx16 mode? Is it possible that from GHRD 15.1 utilities, I compile the design based upon FPPx16 , make uboot, zImage devicetree dtb based on it and transfer the soc_system.rbf file to my Arrow socket board set up at SW6 FPPx16 and it will work?? Any guidance pplease-------

Could it be that FPPx32 is supported when the FPGA is configured through the HPS.

It is only not supported when the FPGA is configured from a non-HPS (external) source.

Configuration though the HPS is the method used by the SD card images.

I am configuring FPGA via uboot. And for FPGA to be configured via FPPx32, you have to set FPGA configuration switches on FPGA board (SW6) to FPPx32 mode otherwise FPGA will not be configured whether it is being configured through HPS or through an external source. And the point here is that FPPx32 is not supported in 5CSXFC6D6F31C8 devices. So all I want to know is why in GHRD tutorial it is shown to set the FPGA configuration switches to FPPx32 mode?

I stand by my statement that FPPx32 works for this device when it is configured via the HPS.

I have the same device. I set MSEL[4:0] to 01001 (FPP x32) and it configured via HPS (U-Boot) just fine, because my rbf file is uncompressed.

To double check, I downloaded their prebuilt SD card image, and after changing the MSEL[0:4] to 01010 as instructed, it configured just fine. This code reads the same in reverse.

So if you still have a problem we need to start looking at other causes.

Did you get your MSEL bits the right way around? Because most people write it MSEL[4:0], but the board is labelled MSEL[0:4]? Irrelevant for code 01010.
Did you get your MSEL bits in the right polarity? Because the board has MSEL bit=1 when the dip switch is in the off position.
Did you get your compression option correct? Because you need the MSEL compression to match the compression you used when you made the rbf file.

The GHRD tutorial is correct for the pre-built image they supply.

Yes I have MSEL SW set correctly. My SD card image is working all fine. GHRD is also working all fine.
Actually my question is that if you see the user manual for Arrow Sockit board (5CSXFC6D6F31C8) then it is clearly mentioned in that FPPx32 is not supported for this device. Now if that is the case then how GHRD image is able to run on Arrow Sockit board with FPPx32 configuration?
In summary, if FPPx32 is not supported by a board according to its manual then how GHRD image is able to run on such a board with FPPx32 configuration?

@lainB Just wanted to confirm about MSEL bits polarity. On my board there is 0 and 1labels on SW6. So for MSEL[0:4] = 01010 I set the switches to MSEL[4:0]= up down up down up. So, I set the switch towards 1 or 0 label respectively. Can you correct me please if I am wrong? Here is also a picture….

You are correct.
The table 5-1 in the Cyclone V Hard Processor System Technical Reference Manual describes exactly what you said.

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Yes, you are correct.
MSEL[4:0]= up down up down up corresponds to
MSEL[4:0]= 01010 and MSEL[0:4]= 01010

I have an early copy of the Arrow SoCKit user manual, and it doesn’t say anything about FPPx32.

If a newer version says FPPx32 is not supported for the device, then it only applies when using an external configuration device. Configuration via HPS works with FPPx32 just fine. I cannot verify the context of the passage you are reading.

Thanks to Rafael for providing a reference - it was probably where I copied it from. The Cyclone V documentation is authoritative.

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Thanks a lot @rafael_Mello and @IainB
I got the answer for my question so the point is that if you program FPGA from HPS then FPPx32 is supported. It is not supported if you use external source to configure FPGA.
Thanks again for help and discussion.