GSRD Release Binaries not working on Arria 10 SD/MMC


#1

We have an Arria 10 SoC dev brd (p/n: 6XX-44382R-OM s/n: 10ASXSoC002854), which boots fine using the factory provided SD card (& FPGA image). However, attempts to replace the socfpga.rbf on the SD card with Released Binaries result in the following message “emif_reset interrupt acknowledged”, followed by a system reset and reloading of the FPGA, then ‘wash-rinse-repeat’.

I’ve tried all the Release Binaries for the Arria 10 SoC dev board: 17.1, 17.0 and 16.1. My method was to mount the SD/USB adapter to my dev Host, replace the factory image with the different version, reinstall on dev board, power-on an observe the terminal window for a successful boot sequence.

I’ve also tried rebuilding the GSRD design in 17.1, then loading the rbf on the SD, again without success.

Shouldn’t the Release Binaries just work?
Is the loaded bitstream verified somehow during u-boot?
Is there a version check performed? The stdout below suggests there’s a CRC checkout performed; on what?
Shouldn’t I be able to rebuild the GSRD design and load the bitstream?

'
U-Boot 2014.10 (May 01 2016 - 08:22:23)

CPU : Altera SOCFPGA Arria 10 Platform
BOARD : Altera SOCFPGA Arria 10 Dev Kit
DRAM: WARNING: Caches not enabled
SOCFPGA DWMMC: 0
FPGA: writing socfpga.rbf
FPGA: Success.emif_reset interrupt acknowledged
emif_reset interrupt acknowledged
emif_reset interrupt acknowledged
Error: Could Not Calibrate SDRAM
DDRCAL: Failed
INFO : Skip relocation as SDRAM is non secure memory
Reserving 2048 Bytes for IRQ stack at: ffe2db10
DRAM : 0 Bytes
WARNING: Caches not enabled
MMC: *** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Model: SOCFPGA Arria10 Dev Kit
Net: dwmac.ff800000
Error: dwmac.ff800000 address not set.

Hit any key to stop autoboot: 0
Early IO release is not enabled!!
** Unable to read file u-boot.scr **
Optional boot script not found. Continuing to boot normally
dwmci_send_cmd: DATA ERROR!
Error reading cluster
** Unable to read file zImage **
dwmci_send_cmd: Timeout.
** Can’t read partition table on 0:0 **
** Invalid partition 1 **
FPGA BRIDGES: enable
data abort
pc : [] lr : []
sp : ffe3bc90 ip : ffe21e6c fp : 00000000
r10: ffe222c0 r9 : ffe2e310 r8 : 00000000
r7 : ffe33ccc r6 : 00000003 r5 : ffe26c1c r4 : ffe26c1c
r3 : 016f2818 r2 : ffe3bcac r1 : ffe3bca8 r0 : 00008000
Flags: nZcv IRQs on FIQs off Mode SVC_32
Resetting CPU …


#2

Hey,

Are you able to solve dwmci_send_cmd: DATA ERROR! ?

Im working on arria10 SX660.
I’m facing the same in one SoM. It boots properly from the second boot onwards.

Observations:
1.Observed in one SoM.
2.Board continuesly resets and hangs after FPGA configuration. Below is the error log,

U-Boot 2014.10 (Dec 07 2018 - 17:20:46)

CPU : Altera SOCFPGA Arria 10 Platform
BOARD : iW-RainboW-G24M Altera SOCFPGA Arria 10
I2C: ready
DRAM: WARNING: Caches not enabled
SOCFPGA DWMMC: 0
dwmci_send_cmd: DATA ERROR!
** No partition table - mmc 0 **
Failed to set filesystem to FAT.
Flash probe failed.
INFO : Skip relocation as SDRAM is non secure memory
Reserving 2048 Bytes for IRQ stack at: ffe386e8
data abort
pc : [] lr : []
sp : ffe3def8 ip : 0000001c fp : 00000001
r10: ffd02078 r9 : ffe3ff38 r8 : ffe00054
r7 : ffe22238 r6 : ffe221e4 r5 : 00000000 r4 : ffffd000
r3 : ffcfb000 r2 : 00000002 r1 : 00000004 r0 : 00000001
Flags: nzcv IRQs off FIQs off Mode SVC_32
Resetting CPU …

resetting …

U-Boot 2014.10 (Dec 07 2018 - 17:20:46)

CPU : Altera SOCFPGA Arria 10 Platform
BOARD : iW-RainboW-G24M Altera SOCFPGA Arria 10
I2C: ready
DRAM: WARNING: Caches not enabled
SOCFPGA DWMMC: 0
dwmci_send_cmd: DATA ERROR!
** Can’t read partition table on 0:0 **
** Invalid partition 1 **
Failed to set filesystem to FAT.
Flash probe failed.
INFO : Skip relocation as SDRAM is non secure memory
Reserving 2048 Bytes for IRQ stack at: ffe386e8
data abort
pc : [] lr : []
sp : ffe3def8 ip : 0000001c fp : 00000001
r10: ffd02078 r9 : ffe3ff38 r8 : ffe00054
r7 : ffe22238 r6 : ffe221e4 r5 : 00000000 r4 : ffffd000
r3 : ffcfb000 r2 : 00000002 r1 : 00000004 r0 : 00000001
Flags: nzcv IRQs off FIQs off Mode SVC_32
Resetting CPU …

resetting …
.
.
.
.
.

U-Boot 2014.10 (Dec 07 2018 - 17:20:46)

CPU : Altera SOCFPGA Arria 10 Platform
BOARD : iW-RainboW-G24M Altera SOCFPGA Arria 10
I2C: ready
DRAM: WARNING: Caches not enabled
SOCFPGA DWMMC: 0
dwmci_send_cmd: DATA ERROR!
Failed to read ghrd_10as066n2.rbf from FAT -1 != 16384.
Failed to read rbf header from FAT.
INFO : Skip relocation as SDRAM is non secure memory
Reserving 2048 Bytes for IRQ stack at: ffe386e8
data abort
pc : [] lr : []
sp : ffe3def8 ip : 0000001c fp : 00000001
r10: ffd02078 r9 : ffe3ff38 r8 : ffe00054
r7 : ffe22238 r6 : ffe221e4 r5 : 00000000 r4 : ffffd000
r3 : ffcfb000 r2 : 00000002 r1 : 00000004 r0 : 00000001
Flags: nzcv IRQs off FIQs off Mode SVC_32
Resetting CPU …

resetting …

U-Boot 2014.10 (Dec 07 2018 - 17:20:46)

CPU : Altera SOCFPGA Arria 10 Platform
BOARD : iW-RainboW-G24M Altera SOCFPGA Arria 10
I2C: ready
DRAM: WARNING: Caches not enabled
SOCFPGA DWMMC: 0
FPGA: writing ghrd_10as066n2.rbf …
Full Configuration Succeeded.

3.Board boots smoothly from next power cycle.
4.Board needs to be Powered off for around 15mins in order to reproduce this issue.

I have also tested using three SD cards, but acing the same issue.

What could have gone wrong with this perticular SoM? Any hints on this is appreciated.

Thank You.
Regards,
Ambika