We are using MTFC16GAKAECN-4M in arria10.
I would like to implement the below logic in order to understand the reset of the board.
To identify the board (software)reset and bypass the FPGA configuration in uboot.
The required workflow is that FPGA configuration should happen only on power ON(POR).
Logic to implement:
- To write the eMMC controller register(ECSD) on POR
- To read the same register bit on reset (on every boot) by expecting the data written on POR
- If the bit is set then the board is reset
- If reset then bypass the FPGA configuration
Please let us know the above is feasible to implement.
Please guide me if possible to implement the above.
- How to write the eMMC controller registers in uboot and linux
- How to read it before FPGA configuration.
To achieve the reset condition detection we have tried many methods… and ended up with system hang in some cases while doing the register access,
FYI, we tried the below methods as well,
- Writing to the DDR memory and reading back, looking for the written pattern, but the system hangs in the place accessing DDR register.
- Using the FPGA PIO register, system hanged while accessing the PIO register.
**eMMC, DDR or PIO cannot be accessed before FPGA configuration? **
I do not have much idea about that, please educate me and let me know the feasibility.
Thanks in advance.