How to program FPGA from HPS (de10-nano)

Hi FPGA friends

I am new to Altera. I’m looking for how to program the FPGA from the HPS on DE10-Nano and any pointers very gratefully received. What I want to do is exactly what’s described here:

That is to say I want to do

dd if=myrogam.rbf of=/dev/fpga0 

But there is no /dev/fpga0

My board is exactly as from factory, says it is running “DE10-Nano Image BUILD VERSION: 2017.03.31 DISTRO: Angstrom v2016.12”

Am I missing something simple? Should I be using a different boot image? Different MSEL switches?

Many thanks for pointers,

(I know how to make the .rbf file, and have successfully loaded flashing LED program from the compilation Ubuntu system by USB Blaster, but need to do it while the Angstrom system is running.)

I’ve not tried that, but what I do is copy the rbf file over to the SDcard with the scp command running under cygwin on my PC (comes with the SoCEDS). I copy the file into the /media/FAT directory on the DE10-nano board, once Linux is booted and I have an ethernet connection to the board. You could also plug the SD card into your PC and copy it over directly onto the FAT partition.

Thanks for suggestion, but won’t it only reload the FPGA from /media/FAT on reboot?

When the bootloader runs on the de10 board, by default it will load the .rbf file. So rebooting Linux will cause it to load the new FPGA file.

What sequence of steps are you trying to accomplish after getting the rbf file loaded onto the SD card – do you want to program the FPGA right away, or can you tolerate a Linux reboot? There may be a Linux utility to program the FPGA file, but I am not aware of one currently.

I’m really trying to avoid reboots: I’m designing a coprocessor which will do various various functions, so need to be able to reprogram it swiftly.

However, @Fabian_red has posted this Load fpga rbf from device tree overlay example? which look very promising. It appears that the HPS can definitely do it through the fpga_manager: Cyclone V manual says:

The FPGA manager provides the following functionality and features:

  • Full configuration and partial reconfiguration of the FPGA portion of the SoC device
  • Drives 32 general-purpose output signals to the FPGA fabric
  • Receives 32 general-purpose input signals from the FPGA fabric

I’ve also found a thing which appears to be this exact thing:

root@de10-nano:~# cat /sys/class/fpga_manager/fpga0/state

So I’m optimistic! Will post any results I get.

Kind regards,


We use the “dd” method as you described in the beginning of this thread on Cyclone V. To do this we use kernel 3.10 since this method was obsoleted in kernel 4.x. I believe that in kernel 4.x you must use the overlay method as you’ve mentioned already. For your store of semi-worthless knowledge we use kernel 3.10 on Cyclone V devices and Kernel 4.1 on Arria 10 devices. We’re still rebooting to load RBF files on the Arria 10 devices so I won’t be of much further help. In any case the kernel 3.10 and included drivers are pretty solid for the Cyclone V devices as they have been around for a while. We’ve shipped thousands of units with that configuration. I hope this was helpful. Cheers!

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“dd” method with kernel 3.10
in kernel 4.x use the overlay method

… aha! that’s really helpful. Given what I found out about the FPGA manager, I’m still optimistic it will be possible, albeit tricky to find.

Thanks for tip.



I’ve been planning on getting to the device overlay method but just haven’t yet made the time. Below is a very sloppy cut-n-paste dump of a text file with some notes I’ve collected while briefly looking into it (rocketboards, etc). Maybe something here will be helpful as well.


----------- pasted below ------

Early IO release

Programming from Linux using Device Tree Overlays

I solved the issue myself. The approach to use Device Trees and programming the
FPGA under Linux has changed fundamentally. There is no /dev/fpga0 device anymore.

Instead, Linux uses Device Tree Overlays now. See the WS2 Linux Kernel Introdution
lab for examples.

The Device Tree Overlay as well as the FPGA RBF file have to reside in /lib/firmware.
To load the overlay, mount the configfs filesystem and create a new directory in the overlay subfolder:

mkdir /config
mount -t configfs configfs /config
mkdir /config/device-tree/overlays/test

Then write the name of your Device Tree Overlay file to a file with name “path”:

echo overlay.dtb > /config/device-tree/overlays/test/path

The kernel driver will then look for the file in “/lib/firmware” and load it into the
default device tree, that came with the kernel.

If you want to load a RBF file into the FPGA, you have to replace external-fpga-config;
with firmware-name = “socfpga.rbf”; in the example overlay file from the WS2 lab.