HPS DDR3 assigments


I have a prototype board that uses a DDR3 SDRAM (2 chips of 256Mx16) connected to HPS in Cyclone V device. The board has a error, bank pins BA[0] and BA[2] are swapped, i.e. pin HPS_BA[0] from HPS is connected to pin DDR_BA[2] pin HPS_BA[2] is connected to DDR_BA[0], pins for address bit [1] are connected correctly. Consequently SDRAM calibration was failed during u-boot preloader start. Is it the way to re-swap this outputs ? I hope there is the way to solve it, maybe by change declaration in u-boot sources or HPS system.