Issues when following tutorial Booting from FPGA


#1

Hello,
I would like to start the HPS from the FPGA,
so I am following the tutorial available on rocketboard ( https://rocketboards.org/foswiki/Documentation/BootFromFPGA150).

I am using Quartus and EDS 17.1

My issue is about loading the preloader.hex into the on-chip memory inside the FPGA.

I use the command given by the tutorial to convert the bootloader form ELF format to hex format.
However Quartus give me the following warning and I cannot load the .sof file into the FPGA then (Quartus programmer display an error at about 73% load).

here the message when I am using the commmand Processing-> Update memory initialization File :

Info: *******************************************************************
Info: Running Quartus Prime MIF/HEX Update
Info: Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
Info: Processing started: Fri Dec 15 17:58:03 2017
Info: Command: quartus_cdb soc_system -c soc_system --update_mif
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Warning (113015): Width of data items in “preloader.hex” is greater than the memory width. Wrapping data items to subsequent addresses. Found 2314 warnings, reporting 10
Warning (113009): Data at line (1) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (2) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (3) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (4) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (5) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (6) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (7) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (8) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (9) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Warning (113009): Data at line (10) of memory initialization file “preloader.hex” is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Critical Warning (127005): Memory depth (65536) in the design file differs from memory depth (36996) in the Memory Initialization File “C:/Users/GN087/Documents/Cyclone_V_Altera_Development_board/Arrow_kit/sockit_ghrd_boot_fpga_rd/software/spl_bsp/preloader.hex” – setting initial value for remaining addresses to 0
Info (39024): Processed the following Memory Initialization File(s)
Info (39025): Processed Memory Initialization File C:/Users/GN087/Documents/Cyclone_V_Altera_Development_board/Arrow_kit/sockit_ghrd_boot_fpga_rd/soc_system/synthesis/submodules/hps_AC_ROM.hex
Info (39025): Processed Memory Initialization File C:/Users/GN087/Documents/Cyclone_V_Altera_Development_board/Arrow_kit/sockit_ghrd_boot_fpga_rd/soc_system/synthesis/submodules/hps_inst_ROM.hex
Info (39025): Processed Memory Initialization File C:/Users/GN087/Documents/Cyclone_V_Altera_Development_board/Arrow_kit/sockit_ghrd_boot_fpga_rd/software/spl_bsp/preloader.hex
Info: Quartus Prime MIF/HEX Update was successful. 0 errors, 13 warnings
Info: Peak virtual memory: 820 megabytes
Info: Processing ended: Fri Dec 15 17:58:11 2017
Info: Elapsed time: 00:00:08
Info: Total CPU time (on all processors): 00:00:08

I tried with Quartus 14.1, and I have the same issues.

Is someone succeed to boot the HPS from the FPGA ?
I don’t know what to do now.

Best regards,
Neudorf