Kernel restart issue while trying to read or write from the address space of hps2fpga and lwhps2fpga - Arria 10

RocketBoards General
1

Currently working on a Arria 10 FPGA and faced this issue while trying to access the gpio connected on the lwhps to fpga bridge but when i try to access the lwhps2fpgs address section(0xff200000) my kernel stucks and restarts.

below i have mentioned the bridge device tree

fpga-bridge@ff200000 {
compatible = “altr,socfpga-lwhps2fpga-bridge”;
reg = <0xff200000 0x00200000>;
resets = <0x06 0x61>;
clocks = <0x08>;
bridge-enable = <0x01>;
altr,l3-syscon = <0x99>;
phandle = <0x5b>;
init_val = <1>;

};

fpga-bridge@c0000000 {
compatible = “altr,socfpga-hps2fpga-bridge”;
reg = <0xc0000000 0x3c000000>;
resets = <0x06 0x60>;
clocks = <0x08>;
bridge-enable = <0x01>;
altr,l3-syscon = <0x99>;
phandle = <0x5c>;
init_val = <1>;
};
been following this guide from rocket board: https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10
and also can any one please share the correct device tree for fpga2hps and fpgs2sdram bridge device tree node

2

Hello,

I am also modifying the device tree to use that function.
I have not yet confirmed that the lwhps2fpga function operates successfully, but the “bridge enable” command in the u-boot stage also operates successfully.
Kernel booting is normal and the fpga-bridge and fpga-manager drivers are also being initialized successfully.
Additionally, state and name are printed successfully in sysfs (/sys/class/fpga_bridge/br0).
However, I am trying to control led_pio, the fpga area, using lwhps2fpga, but it is not easy.
I hope my modification help you.
(arch/arm/boot/dts/socfpga_arria10.dtsi)

/ {
...
    soc {
...
		fpga_mgr: fpga-mgr@ffd03000 {
			compatible = "altr,socfpga-a10-fpga-mgr";
			reg = <0xffd03000 0x100
			       0xffcfe400 0x20>;
			clocks = <&l4_mp_clk>;
			resets = <&rst FPGAMGR_RESET>;
			reset-names = "fpgamgr";
		};

+		fpga_bridge0: fpga-bridge@ff200000 {
+			compatible = "altr,socfpga-lwhps2fpga-bridge";
+			reg = <0xff200000 0x100000>;
+			resets = <&rst LWHPS2FPGA_RESET>;
+			clocks = <&l4_main_clk>;
+			bridge-enable = <1>;

			//linux-socfpga.a9/Documentation/devicetree/bindings/fpga/fpga-region.txt
+			#address-cells = <1>;			#size-cells = <1>;
+			ranges;
+
+			fpga_region0: fpga-region0 {
+				compatible = "fpga-region";
+				fpga-mgr = <&fpga_mgr>;
+
+				// linux-socfpga.a9/Documentation/devicetree/bindings/fpga/fpga-region.txt, Required properties:
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges;
+			};
+		};

+		// linux-socfpga.a9/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
+		fpga_bridge1: fpga-bridge@c0000000 {
+			compatible = "altr,socfpga-hps2fpga-bridge";
+			reg = <0xc0000000 0x10000>;
+			resets = <&rst HPS2FPGA_RESET>;
+			clocks = <&l4_main_clk>;
+			bridge-enable = <0>;
+		};
...
    };
...
};

thanks.