Hi all,
I have an Arria 10 SoC device and try to reconfigure an PLL in the FPGA part of the device.
For that, I use the “PLL Reconfiguration Intel FPGA IP” in my qsys design an append them to the lightweight AXI bridge of the HPS.
Does anyone know, if a Linux driver exist for this IP and where I could find it?
Or what is a good approach for controlling intelFPGA IP from Linux on the SoC device?
Thanks for any hint,
Silvan