Linux-socfpga 5.15.80 LTS SPI Master #1 issue

Board: Altera Cyclone V SocFPGA
Quartus Lite 21.1
Embedded Design Suite Version 20.1 [Build 711]
linux-socfpga 4.20.8 transition to 5.15.80 LTS

In the transition from a working environment running linux-socfpga 4.20.8 into linux-socfpga 5.15.80 LTS I am struggling getting the HPS SPI Master #1 to behave. Some preliminary analysis indicates that the clock is not working as expected, resulting in failure to probe devices attached to HPS SPI Master #1.

HPS SPI Master #0 is working as expected.

The DTS entry for HPS SPI Master #0 (all good and working):

  •   hps_0_spim0: spi@0xfff00000 {
    
  •   	compatible = "snps,dw-spi-mmio-21.1", "snps,dw-spi-mmio", "snps,dw-apb-ssi";
    
  •   	reg = <0xfff00000 0x00000100>;
    
  •   	interrupt-parent = <&hps_0_arm_gic_0>;
    
  •   	interrupts = <0 154 4>;
    
  •   	clocks = <&spi_m_clk>;
    
  •   	#address-cells = <1>;	/* embeddedsw.dts.params.#address-cells type NUMBER */
    
  •   	#size-cells = <0>;	/* embeddedsw.dts.params.#size-cells type NUMBER */
    
  •   	num-cs = <2>;	/* embeddedsw.dts.params.num-cs type NUMBER */
    
  •   	status = "okay";	/* embeddedsw.dts.params.status type STRING */
    
  •        cs-gpios = <&hps_0_gpio2_porta 2 0>,<0>; /* it shall be port C pin 2 - GPIO60 */
    
  •        fram@0 {
    
  •            compatible = "cypress,fm25";
    
  •            reg = <0>;
    
  •            spi-max-frequency = <20000000>;
    
  •            /*spi-cpol;*/
    
  •            /*spi-cpha;*/
    
  •        };
    
  •   }; //end spi@0xfff00000 (hps_0_spim0)
    

The DTS entry for HPS SPI Master #1 (not able to probe any devices that are otherwise working via other SPI interfaces):

  •   hps_0_spim1: spi@0xfff01000 {
    
  •   	compatible = "snps,dw-spi-mmio-21.1", "snps,dw-spi-mmio", "snps,dw-apb-ssi";
    
  •   	reg = <0xfff01000 0x00000100>;
    
  •   	interrupt-parent = <&hps_0_arm_gic_0>;
    
  •   	interrupts = <0 155 4>;
    
  •   	clocks = <&spi_m_clk>;
    
  •   	#address-cells = <1>;	/* embeddedsw.dts.params.#address-cells type NUMBER */
    
  •   	#size-cells = <0>;	/* embeddedsw.dts.params.#size-cells type NUMBER */
    
  •   	num-cs = <1>;	/* embeddedsw.dts.params.num-cs type NUMBER */
    
  •   	status = "okay";	/* embeddedsw.dts.params.status type STRING */
    
  •        cs-gpios = <&hps_0_gpio2_porta 8 0>; /* it shall be port C pin 8 - GPIO66 */
    
  •   }; //end spi@0xfff01000 (hps_0_spim1)
    

The device(s) then attached to HPS SPI Master #0 and #1 are added DTS-wise via overlay(s); e.g. as follows for SPI Master #0:

  • fragment@6 {
  •    target = <&hps_0_spim0>;
    
  •    #address-cells = <1>;
    
  •    #size-cells = <0>;
    
  •    __overlay__ {
    
  •        #address-cells = <1>;    /* embeddedsw.dts.params.#address-cells type NUMBER */
    
  •        #size-cells = <0>;    /* embeddedsw.dts.params.#size-cells type NUMBER */
    
  •        fdr@1 {
    
  •            compatible = "rohm,dh2228fv";
    
  •            reg = <1>;
    
  •            spi-max-frequency = <20000000>;
    
  •            enable-dma = <1>;
    
  •        };
    
  •    }; /* overlay */
    
  • }; /* fragment */

and as follows for HPS SPI Master #1:

  • fragment@5 {
  •    target = <&hps_0_spim1>;
    
  •    #address-cells = <1>;
    
  •    #size-cells = <0>;
    
  •    __overlay__ {
    
  •        #address-cells = <1>;
    
  •        #size-cells = <0>;
    
  •        ad7173@0 {
    
  •            compatible = "adi,ad7173-8";
    
  •            reg = <0>;
    
  •            /*spi-cpol;*/
    
  •            /*spi-cpha;*/
    
  •            spi-max-frequency = <12500000>;
    
  •            interrupt-parent = <&hps_0_gpio2_porta>;
    
  •            interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
    
  •            miso-gpios = <&hps_0_gpio2_porta 4 GPIO_ACTIVE_HIGH>;
    
  •            gpio-line-names =
    
  •                "IOP_WLD_EN_01", "IOP_WLD_EN_02",
    
  •                "IOP_WLD_EN_03", "IOP_WLD_EN_04";
    
  •            adi,channels {
    
  •                #address-cells = <2>;
    
  •                #size-cells = <0>;
    
  •                channel@15 {
    
  •                    reg = <15 16>;
    
  •                    channel-name = "WLD_V";
    
  •                };
    

We have other SPI interfaces where SPI Master is driven by FPGA and where ad7173 is working in this environment, but I am not able to get ad7173 working on HPS SPI Master #1 under linux-socfpga 5.15.80 LTS.

I am wondering whether the overlay/DTS requirements for the 5.15.80 LTS HPS SPI Master have changed in any way or perhaps there are other changes that I have missed in this transition.

Any help, tips, hints, suggestions on what to look into, etc. are appreciated.

Thanks.

/Eldor R.

Seems like the issue is related to inverted cs-gpios need on HPS SPI Master #1 versus HPS SPI Master #0 - oscilloscope measurements confirms this.

Not working:

  •   hps_0_spim1: spi@0xfff01000 {
    
  •   	compatible = "snps,dw-spi-mmio-21.1", "snps,dw-spi-mmio", "snps,dw-apb-ssi";
    
  •   	reg = <0xfff01000 0x00000100>;
    
  •   	interrupt-parent = <&hps_0_arm_gic_0>;
    
  •   	interrupts = <0 155 4>;
    
  •   	clocks = <&spi_m_clk>;
    
  •   	#address-cells = <1>;	/* embeddedsw.dts.params.#address-cells type NUMBER */
    
  •   	#size-cells = <0>;	/* embeddedsw.dts.params.#size-cells type NUMBER */
    
  •   	bus-num = <0>;	/* embeddedsw.dts.params.bus-num type NUMBER */
    
  •   	num-chipselect = <4>;	/* embeddedsw.dts.params.num-chipselect type NUMBER */
    
  •   	status = "okay";	/* embeddedsw.dts.params.status type STRING */
    
  •        cs-gpios = <&hps_0_gpio2_porta 8 0>,<0>,<0>,<0>; /* Eldor R. - keep GPIO Active HIGH for ad7173 to work (it shall be port C pin 8 - GPIO66) */
    
  •   }; //end spi@0xfff01000 (hps_0_spim1)
    

Working:

  •   hps_0_spim1: spi@0xfff01000 {
    
  •   	compatible = "snps,dw-spi-mmio-21.1", "snps,dw-spi-mmio", "snps,dw-apb-ssi";
    
  •   	reg = <0xfff01000 0x00000100>;
    
  •   	interrupt-parent = <&hps_0_arm_gic_0>;
    
  •   	interrupts = <0 155 4>;
    
  •   	clocks = <&spi_m_clk>;
    
  •   	#address-cells = <1>;	/* embeddedsw.dts.params.#address-cells type NUMBER */
    
  •   	#size-cells = <0>;	/* embeddedsw.dts.params.#size-cells type NUMBER */
    
  •   	bus-num = <0>;	/* embeddedsw.dts.params.bus-num type NUMBER */
    
  •   	num-chipselect = <4>;	/* embeddedsw.dts.params.num-chipselect type NUMBER */
    
  •   	status = "okay";	/* embeddedsw.dts.params.status type STRING */
    
  •        cs-gpios = <&hps_0_gpio2_porta 8 1>,<0>,<0>,<0>; /* Eldor R. - keep GPIO Active HIGH for ad7173 to work (it shall be port C pin 8 - GPIO66) */
    
  •   }; //end spi@0xfff01000 (hps_0_spim1)
    

Do not yet understand why …