Hello looking for answers to questions. Qsys has an NCO IP core. Sine generator. I can change the frequency of the input clk and thereby adjust the frequency of the sinus output. But this is not enough for me, I would like to set a fixed frequency at the input, then control the frequency of the sinusoid at the output. Tell me how to do this, the kernel supports this feature?
There is also an IP core for the synthesis of digital FIR filters. Can I make a filter into which you can load the coefficients in the process of working in real time? That is, bring the Avalon bus to it and load coefficients from the flash memory