The DPR is working from the 2 sides, we manage to read and write
from the HPS and from the FPGA.
the problem is , we can’t transfer data from the FPGA to the HPS.
The DPR is working from the 2 sides, we manage to read and write
from the HPS and from the FPGA.
the problem is , we can’t transfer data from the FPGA to the HPS.