I’m running intel quartus prime standard edition (18.1), and intel SoC EDS (18.0), both with free evaluation licenses. I am trying to build the cyclone V GHRD. I follow the rocketboards.org procedure to compile the hardware design, and generate the preloader, but when I try to compile the preloader in the SoC EDS command shell I get this message:
nferguson@D14NFergusonDT ~/Desktop/DE10_NANO_SoC_GHRD/software/spl_bsp
$ make
tar zxf /cygdrive/c/intelFPGA/18.1/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz
tar: Error opening archive: Failed to open ‘/cygdrive/c/intelFPGA/18.1/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz’
make: *** [uboot-socfpga/.untar] Error 1
Here are links to the design flow I am following:
I would very grateful for any help or advice. Thanks!
Hello EagerToLearn,
If one uses the tutorial you refer to (EDS running under Win10), the very same error happens.
Does anybody have a solution for this error?
Best Regards
Johi.
The tutorial is for linux users but basically it should also work for Windows.
I would check the make file for linux commands and replace them with the Windows equivalents.