Please help with compiling preloader for Cyclone V SoC FPGA GHRD project


#1

I’m running intel quartus prime standard edition (18.1), and intel SoC EDS (18.0), both with free evaluation licenses. I am trying to build the cyclone V GHRD. I follow the rocketboards.org procedure to compile the hardware design, and generate the preloader, but when I try to compile the preloader in the SoC EDS command shell I get this message:
nferguson@D14NFergusonDT ~/Desktop/DE10_NANO_SoC_GHRD/software/spl_bsp
$ make
tar zxf /cygdrive/c/intelFPGA/18.1/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz
tar: Error opening archive: Failed to open ‘/cygdrive/c/intelFPGA/18.1/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz’
make: *** [uboot-socfpga/.untar] Error 1

Here are links to the design flow I am following:



I would very grateful for any help or advice. Thanks!


#2

Hi nick_poc,

I have/had the same problem(s) when following the RocketBoards tutorials;

After a while I found this tutorial:

https://bitlog.it/hardware/building-embedded-linux-for-the-terasic-de10-nano-and-other-cyclone-v-soc-fpgas/

This worked/works fine for me! Just do exactly as described and you’ll be fine.

Cheers,
Richard