Hi! I have problems changing the rbf-file of a previously working Cyclone V SoC-system on the DE10-Nano
Quartus compiles without any errors, the MSEL switches are in the right position, the old and the new rbf-file have the same size. However during booting the system, I receive the error message
“altera_load: Failed with error code -4”
The changes I made inside the FPGA Codes: Previoulsly a debug-output was connected to an output conduit (alternatingly set a 4 bit port to all 0 or all 1 with the clock). Now I connect the “real” output to the output conduit. In ModelSim all the modules work fine.
So the symptom description is: “A simple output works but a complexly calculated output doesn’t work and prevents the system from booting, even though ModelSim makes me assume that the calculations are correct”
I am quite sure use only synthesizable code and I only receive warnings for altera/intel IP modules and not for my custom modules.