Unless someone has had exactly the same problem as you, it is not likely that someone will be able to help you. We need more information.
What version of u-boot are you attempting to use? u-boot-socfpga?
What compiler? What part? It’s an SOC, right? Or are you using a soft core CPU?
Here are my instructions to myself on how to build u-boot:
First you must have an FPGA completely built with the CPU as part of it (I.E. a qsys file from Platform Designer). Then you can do the following:
- In your quartus design directory, mkdir -p software/bootloader
- Run the altera bsp shell. /opt/intelFPGA/20.2/embedded/embedded_command_shell.sh
- bsp-create-settings --jdi [your].jdi --type spl --bsp-dir software/bootloader --preloader-settings-dir “hps_isw_handoff/CPU_Subsys2_hps_0” --settings software/bootloader/settings.bsp
- From the quartus design directory: cd software/bootloader
- git clone https://github.com/altera-opensource/u-boot-socfpga
- cd u-boot-socfpga
*** Steps 7 through 8 help you find the latest tag: it is not necessary, the latest code usually works ***
- git checkout -t -b feature (notice the name of the feature it selects: for me it was: ‘feature’ set up to track local branch ‘socfpga_v2020.07’)
- git checkout -b test -t origin/socfpga_v2020.07
- patch -p1 < /[path]/[to]/[your].patch (if any)
- export ARCH=arm
- export CROSS_COMPILE=arm-linux-gnueabihf-
- export PATH=/opt/gcc-linaro-7.5.0-2019.12-x86_64_arm-linux-gnueabihf/bin:$PATH (or where ever you installed linaro gcc)
- This is all one command:
./arch/arm/mach-socfpga/qts-filter.sh cyclone5 …/…/…/ …/ ./board/altera/[your board file]/qts/
- make [your]_defconfig
- make -j (where is the number of threads on your PC)
- The file named, “u-boot-with-spl.sfp” is the binary image for the spi flash. Offset is 0. There are four copies of the init code each 64KB long and then all of u-boot.
I hope this helps.