Problem with uboot generator

we try to grnerate uboot file,
in the process we run the make file and we received (althogh we can run the archive stand alone in the same file):

$ make
tar zxf /cygdrive/c/intelFPGA_lite/18.1/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz
tar: Error opening archive: Failed to open ‘/cygdrive/c/intelFPGA_lite/18.1/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz’
make: *** [uboot-socfpga/.untar] Error 1

Unless someone has had exactly the same problem as you, it is not likely that someone will be able to help you. We need more information.

What version of u-boot are you attempting to use? u-boot-socfpga?

What compiler? What part? It’s an SOC, right? Or are you using a soft core CPU?

Here are my instructions to myself on how to build u-boot:

First you must have an FPGA completely built with the CPU as part of it (I.E. a qsys file from Platform Designer). Then you can do the following:

  1. In your quartus design directory, mkdir -p software/bootloader
  2. Run the altera bsp shell. /opt/intelFPGA/20.2/embedded/embedded_command_shell.sh
  3. bsp-create-settings --jdi [your].jdi --type spl --bsp-dir software/bootloader --preloader-settings-dir “hps_isw_handoff/CPU_Subsys2_hps_0” --settings software/bootloader/settings.bsp
  4. From the quartus design directory: cd software/bootloader
  5. git clone https://github.com/altera-opensource/u-boot-socfpga
  6. cd u-boot-socfpga
    *** Steps 7 through 8 help you find the latest tag: it is not necessary, the latest code usually works ***
  7. git checkout -t -b feature (notice the name of the feature it selects: for me it was: ‘feature’ set up to track local branch ‘socfpga_v2020.07’)
  8. git checkout -b test -t origin/socfpga_v2020.07
  9. patch -p1 < /[path]/[to]/[your].patch (if any)
  10. export ARCH=arm
  11. export CROSS_COMPILE=arm-linux-gnueabihf-
  12. export PATH=/opt/gcc-linaro-7.5.0-2019.12-x86_64_arm-linux-gnueabihf/bin:$PATH (or where ever you installed linaro gcc)
  13. This is all one command:
    ./arch/arm/mach-socfpga/qts-filter.sh cyclone5 …/…/…/ …/ ./board/altera/[your board file]/qts/
  14. make [your]_defconfig
  15. make -j (where is the number of threads on your PC)
  16. The file named, “u-boot-with-spl.sfp” is the binary image for the spi flash. Offset is 0. There are four copies of the init code each 64KB long and then all of u-boot.

I hope this helps.