Stratix 10 SoC Design Example for 10Gbe with IEEE1588 PTP Capability - Missing Files

Hi,

I am trying to compile the Stratix 10 SoC Design Example for 10Gbe with IEEE1588 PTP Capability sample project and I am getting compilation errors that the tx_dma_prefetcher and a handful of other IP cores could not be found. I can see the IP files in the directory. Why is this not working?

Warning: tx_dma_prefetcher.interface_requirements: Your system is missing the required interface “Descriptor_Read_Master”. Either export the interface, or edit your definitions in the Interface Requirements tab."
Warning: altera_msgdma_prefetcher_ts_insert_inst: Component type altera_msgdma_prefetcher_ts_insert is not in the library
Error: tx_dma_timestamp_insert.altera_msgdma_prefetcher_ts_insert_inst: Component altera_msgdma_prefetcher_ts_insert 1.0.0 not found or could not be instantiated
Warning: tx_dma_timestamp_insert.interface_requirements: Your system is missing the required interface “clock”. Either export the interface, or edit your definitions in the Interface Requirements tab."
Warning: tx_dma_timestamp_insert.interface_requirements: Your system is missing the required interface “reset”. Either export the interface, or edit your definitions in the Interface Requirements tab."
Warning: tx_dma_timestamp_insert.interface_requirements: Your system is missing the required interface “snk_response”. Either export the interface, or edit your definitions in the Interface Requirements tab."
Warning: tx_dma_timestamp_insert.interface_requirements: Your system is missing the required interface “snk_timestamp”. Either export the interface, or edit your definitions in the Interface Requirements tab."
Warning: tx_dma_timestamp_insert.interface_requirements: Your system is missing the required interface “src_response”. Either export the interface, or edit your definitions in the Interface Requirements tab."
Error: qsys-generate failed with exit code 3: 1 Error, 6 Warnings