I am trying to get my custom A10 board to boot into U-boot via QSPI flash. I loaded U-boot and the FPGA itb files using quartus_hps and it gets to the point of printing “FPGA: Early Release Succeeded.”, but stalls shortly after. I have debug defined in my socfpga_arria10_socdk.h file to see debug prints and here’s the tail end of what I receive before it stalls on multiple boards. How can I determine where it’s “stuck”?
FPGA: Additional 10 sync word needed
fdtdec_get_addr_size_fixed: reg: addr=00000000x, size=x
FPGA: Early Release Succeeded.
0 0
- 0 0 'spi@ff809000'
- found
spi_find_chip_select: plat=ffe29980, cs=0
spi_get_bus_and_cs: bus=ffe29880, slave=ffe2b158
0 -1
0 0
- -1 -1 'sysreset'
- not found
clk_set_defaults(rstmgr@ffd05000)
clk_set_default_parents: could not read assigned-clock-parents for ffe29a10
ofnode_read_prop: assigned-clock-rates: <not found>
fdtdec_get_addr_size_auto_parent: na=1, ns=1, fdtdec_get_addr_size_fixed: reg: addr=00000000x
I did not program any jffs2 filesystem to the QSPI flash - is it needed just to get to a U-boot prompt and NOT boot Linux?
Thank you…