Hi,
I’m trying to debug my bare-metal project on my own design Cyclone V board using DS-5. After adding preloader.ds file into debug configuration, the “timed out” error occurs, which does not appear without preloader.ds file. The whole commands printed out and part of spl.c are shown below.
Thanks for any advices.
Stopping running target Altera - Cyclone V SoC (Dual Core) on TCP:localhost on connection
Connected to running target Altera - Cyclone V SoC (Dual Core) on TCP:localhost
Execution stopped in SVC mode at S:0x00000964
S:0x00000964 TST r1,#1
cd "E:\Uncool\arm"
Working directory "E:\Uncool\arm"
Execution stopped in SVC mode at S:0x00000964
S:0x00000964 TST r1,#1
source /v "D:\Program Files\DS-5 v5.22.0\sw\debugger\configdb\Scripts\altera_target_check.py"
No SYSID registers could be found. Has a peripheral description file been supplied?
loadfile "E:\Uncool\arm\interrupt_fpga\Debug\interrupt_fpga.axf"
Loaded section IRAM1: S:0xFFFF0000 ~ S:0xFFFF17AB (size 0x17AC)
Loaded section IRAM1: S:0xFFFF17AC ~ S:0xFFFF17D3 (size 0x28)
Entry point S:0xFFFF0000
Semihosting server socket created at port 8000
Semihosting enabled automatically due to semihosting symbol detected in image 'interrupt_fpga.axf'
set debug-from *$ENTRYPOINT
start
Starting target with image E:\Uncool\arm\interrupt_fpga\Debug\interrupt_fpga.axf
Running from entry point
wait
Execution stopped in SVC mode at S:0xFFFF0000
In alt_interrupt_armcc.s
S:0xFFFF0000 49,0 LDR PC, alt_reset_addr
source /v "E:\Uncool\arm\interrupt_fpga\preloader.ds"
+reset system
+stop
WARNING(CMD315): Target is not running
+wait 5s
+set semihosting enabled 0
Target has been reset
Execution stopped in SVC mode at S:0x00000964
S:0x00000964 TST r1,#1
+loadfile "$sdir/uboot-socfpga/spl/u-boot-spl" 0x0
Loaded section .text: S:0xFFFF0000 ~ S:0xFFFF78E3 (size 0x78E4)
Loaded section .rodata: S:0xFFFF78E4 ~ S:0xFFFF9A9F (size 0x21BC)
Loaded section .data: S:0xFFFF9AA0 ~ S:0xFFFFA973 (size 0xED4)
Entry point S:0xFFFF0000
+set debug-from *$entrypoint # Set start-at setting to address of $entrypoint
+start
Starting target with image E:\Uncool\arm\interrupt_fpga\uboot-socfpga\spl\u-boot-spl
Running from entry point
Execution stopped in SVC mode at S:0xFFFF0000
In start.S
S:0xFFFF0000 39,0 _start: b reset
+delete
All user breakpoints deleted
+tbreak spl_boot_device
Breakpoint 3 at S:0xFFFF130C
on file spl.c, line 71
on file spl.c, line 81
+cont
+wait 60s
ERROR(CMD360):
# in E:\Uncool\arm\interrupt_fpga\preloader.ds:45 while executing: wait 60s
! Wait for stopped timed out
ERROR(CMD656): The script E:\Uncool\arm\interrupt_fpga\preloader.ds failed to complete due to an error during execution of the script
The file spl.c(line 71 and line 81 are marked
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_SYS_UBOOT_START
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#endif
#ifndef CONFIG_SYS_MONITOR_LEN
#define CONFIG_SYS_MONITOR_LEN (200 * 1024)
#endif
u32 *boot_params_ptr = NULL;
struct spl_image_info spl_image;
/* Define board data structure */
static bd_t bdata __attribute__ ((section(".data")));
inline void hang(void)
{
puts("### ERROR ### Please RESET the board ###\n");
for (;;)
;
}
/*
* Default function to determine if u-boot or the OS should
* be started. This implementation always returns 1.
*
* Please implement your own board specific funcion to do this.
*
* RETURN
* 0 to not start u-boot
* positive if u-boot should start
*/
**(line 71：)**#ifdef CONFIG_SPL_OS_BOOT
__weak int spl_start_uboot(void)
{
puts("SPL: Please implement spl_start_uboot() for your board\n");
puts("SPL: Direct Linux boot not active!\n");
return 1;
}
#endif
/*
**(line 81):** * Weak default function for board specific cleanup/preparation before
* Linux boot. Some boards/platforms might not need it, so just provide
* an empty stub here.
*/
__weak void spl_board_prepare_for_linux(void)
{
/* Nothing to do! */
}
void spl_parse_image_header(const struct image_header *header)
{
u32 header_size = sizeof(struct image_header);
if (image_get_magic(header) == IH_MAGIC) {
if (spl_image.flags & SPL_COPY_PAYLOAD_ONLY) {
/*
* On some system (e.g. powerpc), the load-address and
* entry-point is located at address 0. We can't load
* to 0-0x40. So skip header in this case.
*/
spl_image.load_addr = image_get_load(header);
spl_image.entry_point = image_get_ep(header);
spl_image.size = image_get_data_size(header);
} else {
spl_image.entry_point = image_get_load(header);
/* Load including the header */
spl_image.load_addr = spl_image.entry_point -
header_size;
spl_image.size = image_get_data_size(header) +
header_size;
}
spl_image.os = image_get_os(header);
spl_image.name = image_get_name(header);
spl_image.crc = image_get_dcrc(header);
spl_image.crc_size = image_get_data_size(header);
debug("spl: payload image: %s load addr: 0x%x size: %d\n",
spl_image.name, spl_image.load_addr, spl_image.size);
} else {
/* Signature not found - assume u-boot.bin */
debug("mkimage signature not found - ih_magic = %x\n",
header->ih_magic);
/* Let's assume U-Boot will not be more than 200 KB */
spl_image.size = CONFIG_SYS_MONITOR_LEN;
spl_image.entry_point = CONFIG_SYS_UBOOT_START;
spl_image.load_addr = CONFIG_SYS_TEXT_BASE;
spl_image.os = IH_OS_U_BOOT;
spl_image.name = "U-Boot";
spl_image.crc_size = 0;
}
}
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