Write buttons position into RAM on De0-Nano-SoC

Hi all !

I’m trying to do something that looks like simple in a first time, is to write some value (from buttons for example) into the RAM attached to the HPS of my Cyclone V chip.

Under QSys, the PIO IP outputs an Avalon Memory Mapped Slave. I want to write the data coming from this bus into the f2h_sdram0_data HPS bridge.
I’m sure an IP block is required between them, to set the address where to write and to write corrects commands to the DMA.

I need your help to explain me what is the way to connect the PIO to the HPS, in order to write the data at high speed at a specific address.

Then I’ll access that data into the onchip Linux, but that part is simpler for me!

Thanks for you support and ideas!

Léo from :fr:

Hi Leo,

Have you looked into the F2SDRAM ports on the HPS? That is what you will need to write to. As for the exact address, in a design I created I allocated space via a device driver in Linux and passed that address to a custom FW module and subsequently an Address Span Extender. Via Avalon-MM you can then write data.

There are other ways to allocate space in RAM but I am not as familiar with those. Additionally, you can create a device driver which is interrupted by changes in the push buttons switches to capture their value and then write in to RAM.


Why is it required to let some GPIO logic like buttons write data into RAM?
What do you want to do on the software side?

Hello srp5566, hello thaler.

In fact I just want to write some data to the RAM to be sure that I can read it in the HPS.
I hoped that with QSys that will be simple, but I can’t simply connect buttons or random number generator to the msgdma.

Is there a simple simple way to put data into a specified region of RAM through sgdma ?

Thanks !


A simple approach would be to use on-chip memory initialized with a known pattern in your QSYS design. Additionally, create a MSGDMA instance and connect the input to the on-chip memory, output to the F2SDRAM port on the HPS. Via SW you are then required to setup and trigger the DMA which will take the contents of the on-chip memory and place it in HPS RAM.

Worth noting that you will still need to identify the location in HPS RAM that you will DMA into. It can be accomplished (as I did) using the Address Span Extender in between the MSGDMA and F2SDRAM port. If you do it the same way you’ll need to allocate kernel space memory to DMA into.

An Altera created how-to video can be found here: https://www.youtube.com/watch?v=QmZIZ6VfPCU
Or the QSYS System Design Component Handbook: https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=2&ved=0ahUKEwjpoK6KrIHSAhXLgFQKHVYoAjcQFggjMAE&url=https%3A%2F%2Fwww.altera.com.cn%2Fzh_CN%2Fpdfs%2Fliterature%2Fhb%2Fqts%2Fqsys_system_components.pdf&usg=AFQjCNGdnsfTHZXfygoHnQuyNGZBWw803A&sig2=iaBBZgETaEYl13-ALdvfog&cad=rja