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Welcome to the RocketBoards Forum
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1
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4204
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May 18, 2015
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Arria 10 SoC HPS-to.FPGA
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4
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140
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March 26, 2025
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Any crustaceans out there?
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0
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72
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March 21, 2025
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SoC EDC 18.1 Preloader issue
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0
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62
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February 26, 2025
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LINUX versions supported by sopc2dts
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0
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63
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February 7, 2025
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Sockit USB problems with Linux LXDE Desktop and GSRD v16.0 not fully booting
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0
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48
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December 17, 2024
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Data read write from cyclone 5 soc fpga using Lightweight AXI Bridge using uboot2020.07
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0
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50
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December 17, 2024
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Modem Project with DE10 nano and AD9361
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1
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89
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November 30, 2024
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Makefile for cyclone 5 soc device driver
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1
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65
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November 5, 2024
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Uboot dm driver not probed
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1
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101
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November 5, 2024
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[Agilex]:Error Sending Bitstream..!
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2
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525
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November 5, 2024
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GSRD for Agilex 7 M-Series with HBM2E Present. Is the design correct?
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0
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42
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October 28, 2024
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GSRD for Agilex 7 FPGA M-Series Development Kit - PCIe design instantiates P-Tile PCIe!
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0
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31
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October 28, 2024
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Agilex7 u-boot: how to stop and prompt?
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1
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85
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October 28, 2024
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How we can get the example design of Agilex 7 SoC E-Tile Design Example With IEEE1588 PTP (10GE/25GE/Dynamic Reconfiguration) - Sustaining
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0
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39
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October 28, 2024
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Agilex 7 SoC GSRD documentation. Trusted firmware outdated
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0
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37
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October 22, 2024
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DE10 Nano (Cyclone V) Image Not Working
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1
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135
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October 20, 2024
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Need to check the CPU frequency and ECC In Agilex 7 I series
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0
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39
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October 18, 2024
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Ethernet on DE10-Nano
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0
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102
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October 14, 2024
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Cyclone V ,PinMux
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1
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100
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October 14, 2024
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Arria 10 Arria 10 SoC GSRD documentation. Trusted firmware outdated
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0
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37
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October 3, 2024
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Cyclone V, Pin Multiplexing
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0
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63
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September 30, 2024
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DE-10 Standard, LXDE, ALSA, WM8731 Audio Input Problem
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0
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36
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September 28, 2024
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FPGA to HPS data transfer in DE1 SoC
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0
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78
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September 23, 2024
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Arria10 cold reset not working
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0
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49
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September 20, 2024
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Signal bvalid of Agilex HPS is too slow when Rtile BAM writes to CCU through f2h_bridge
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2
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61
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September 16, 2024
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Simulating f2h ace-lite for HPS
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0
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31
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September 10, 2024
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How to run Iperf on DE10 nano?
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0
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35
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September 3, 2024
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Cross compiler for CYCLONE 5 HPS
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1
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90
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September 3, 2024
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De1-soc valid KERNEL SRC path
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0
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30
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September 1, 2024
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