I am using Altera Cyclone V SoC Dev Kit (Rev.D), with original SD image (Kernel v3.9).
I have get the v3.10ltsi-rel source code from RocketBoards, and compiled with below procedure.
source : https://github.com/altera-opensource/linux-socfpga/archive/rel_socfpga-3.10-ltsi-rt_15.06.01_pr.tar.gz
* export ARCH=arm
- make socfpga_defconfig
- (optional to make changes to kernel configuration)
- make menuconfig
- export CROSS_COMPILE=arm-linux-gnueabihf-
- make uImage LOADADDR=0x8000
update zImage in SD card partition.
After SD booting, the console message stops at “starting kernel …”
What’s the correct procedure to update Linux kernel from v3.9 to v3.10ltsi into SD card ?
Thanks in advance.
--------------------------------- console message ----------------------------------------
U-Boot SPL 2013.01.01 (Nov 04 2013 - 05:23:36)
BOARD : Altera SOCFPGA Cyclone V Board
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: ECC Enabled
ALTERA DWMMC: 0
U-Boot 2013.01.01 (Nov 04 2013 - 23:53:26)
CPU : Altera SOCFPGA Platform
BOARD : Altera SOCFPGA Cyclone V Board
DRAM: 1 GiB
MMC: ALTERA DWMMC: 0
*** Warning - bad CRC, using default environment
Warning: failed to set MAC address
Hit any key to stop autoboot: 0
200 bytes read in 6 ms (32.2 KiB/s)
## Executing script at 02000000
7007204 bytes read in 2405 ms (2.8 MiB/s)
## Starting application at 0x3FF831BC ...
## Application terminated, rc = 0xA
ffd08028: 00000000 ....
ffc25080: 00000000 ....
ffd0501c: 00000000 ....
3468280 bytes read in 1198 ms (2.8 MiB/s)
18049 bytes read in 15 ms (1.1 MiB/s)
## Flattened Device Tree blob at 00000100
Booting using the fdt blob at 0x00000100
Loading Device Tree to 03ff8000, end 03fff680 ... OK
Starting kernel ...
I have the same problem with Terasic´s DE1-SoC board. I want to update the original image given by Terasic replacing kernel and filesystem. I created the topic Trying to run Angstrom on DE1-SoC.
If you find a solution to your problem please, let me know.
I also has this problem，did you find a solution?
@LUCIANC, @roberbot, @alexlee84
After compiling your kernel, check this directory:
/arch/arm/boot/dts copy these three files:
Now from the Embedded Command Shell, compile these files into a single .dtb file:
dtc -I dts -O dtb -o socfpga.dtb socfpga_cyclone5.dts
Copy the generated socfpga.dtb to your SD card and you should be able to boot kernel.
I tried this with kernel version 3.10-ltsi, and I think all kernel versions come with .dts files.
Note that you should edit .dts files according to the implemented hardware design. Usually, sopc2dts tool should do that but I have been struggling for a few days with this tool without getting any bootable .dtb file. Probably XML board files I am using are corrupted or incompatible with new kernels, and I could not find working copies for my board DE1-SoC.
I have solved the problem. I could generate a .dtb that permits me to run all new kernels like poky explained in gsrd13 Or angstrom newest and also ltsi explained in gsrd 14.x.
I did that:
-first tried the one in de1-soc ghrd located inside de1-soc cd. Didn’t work. Stopped when loading kernel.
-then tried to regenerate this file using 14.1 tools.
-then i tried with the workshop2 of rocketboards, that explains how to generate dtb for de0nanosoc, a similar board. Didnt work. Obvious because the hardware described (de0nanosoc) is different from the real one (de1soc).
-finally i realized that workshop 2 used different xml files than de1soc gsrd. I have found a guy saying that version 14 and above the clocks.xml file available in de1soc ghrd is no longer needed, and the common_board is used. So i combined the method in workshop2 with the files in de1soc ghrd. So i used as input for sopc2dtb utility .sopcinfo generated compiling qsys in de1ghrd project, common_board_info.xml from de0_nano files available in workshop2, and hps0_board_info.xml or something like that available in de1soc ghrd folder. I didnt use the 2 step method: sopc2dts followed by dtc. I direcly used sopc2dts utility. Used as input files explained above, as --type dtb, as output file socfpga.dtb. socfpga.dtb is the name that uboot is going to look for by default so this shoud be the name of the output file.
The problem with all this i think is related with versions. Terasic provides all files with a hw structure that new kernels can not understand. I haven t gone inside .dts files deeply yet.
I am with my phone but i have complete documentation about that on my computer, maybe i can make a blog or post it on rocketboards. If you have problems i will do a better explanation when i have access to my computer or i can send you my .dtb (bit it is always better to know how to do it).
Unfortunately, I tried every possible combination including those you addressed, but nothing worked.
Only the dtb file that is generated by the method I explained above worked for me.
If you think about it, why every kernel version comes with a bunch of .dts files? I am not a linux expert and I would like to hear a reasonable explanation.