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How to read and write from my HPS/SoC to a fifoed UART setup in qsys?
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1
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909
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September 23, 2021
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Error: Definition of nested anonymous union in packed must be __packed
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0
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376
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September 11, 2021
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FPGA design document of the Arria 10 Soc GHRD
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0
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321
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September 6, 2021
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Arrow SoCKit board file and/or memory def
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0
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282
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September 5, 2021
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DE1-SOC. Kernel Panic
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0
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557
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August 28, 2021
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[SOLVED] DE10-Nano Lightweight HPS to FPGA works fine but hangs with heavyweight HPS to FPGA
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1
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952
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August 21, 2021
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Cyclone V soc - problem with openocd
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1
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1673
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July 30, 2021
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Beginner to ADC-SoC
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0
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517
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July 25, 2021
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Why does the communication distance of the CAN transceiver become short?
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0
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1170
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June 29, 2021
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Login: Can't set Groups: Operation not permited
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0
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352
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June 18, 2021
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Cyclone V SoC Development kit
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0
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369
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June 12, 2021
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How to verify ECC
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1
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365
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June 7, 2021
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RTC Battery Type for S10 SoC Dev Kit?
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0
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293
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May 29, 2021
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HPS-FPGA DDR sharing on Cyclone V SoC
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12
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10443
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May 20, 2021
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Jtagconfig and usbip
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2
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1092
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May 5, 2021
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DE10-nano FPGA usb blaster not detected
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1
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935
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April 22, 2021
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Running Linux on hps of DE1_SOC (newbie)
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0
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364
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April 1, 2021
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Problem with uboot generator
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1
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455
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March 28, 2021
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HPS design for Agilex F-series development kit?
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0
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357
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March 8, 2021
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PCIe root port example questions
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1
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630
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March 2, 2021
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Problems with DE10nano and SPI EEPROM
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2
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633
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February 4, 2021
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What's difference of Agilex GSRD and boot linux?
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0
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307
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February 4, 2021
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Preloader can not be generated ！！！ HOT!
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0
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399
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January 15, 2021
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Problem with fpga2hps Bridge
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11
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7545
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December 17, 2020
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HPS-to-FPGA read failure
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0
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431
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December 13, 2020
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Custom Neural Network on DE10-Nano
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3
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1746
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October 19, 2020
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OpenSSL FIPS supprt
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0
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345
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October 16, 2020
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Stratix 10 SoC Design Example for 10Gbe with IEEE1588 PTP Capability - Missing Files
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1
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639
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September 30, 2020
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Absolute beginner's guide to DE10-Nano
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1
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1784
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September 27, 2020
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Stratix 10 SOC Dev Board - Signal Tap Not Working
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4
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1500
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September 23, 2020
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